Parallel Performance Project Research Paper

Research Paper

Minimizing Register Requirements of a Modulo Schedule via Optimum Stage Scheduling
A. E. Eichenberger, E. S. Davidson, and S. G. Abraham
International Journal of Parallel Programming, Vol 2 (2), pp 103-132, April, 1996

Abstract

Modulo scheduling is an efficient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirements. We present an approach that schedules the loop operations for minimum register requirements, given a modulo reservation table. Our method determines optimal register requirements for machines with finite resources and for general dependence graphs. Measurements on a benchmark suite of 1327 loops from the Perfect Club, SPEC-89, and the Livermore Fortran Kernels show that the register requirements decrease by 24.5% on average when applying the optimal stage scheduler to the MRT-schedules of a register-insensitive modulo scheduler.