Parallel Performance Project Research Paper

Research Paper

Minimum Register Requirements for a Modulo Schedule
A. E. Eichenberger, S. G. Abraham, and E. S. Davidson
Proceedings of the 27th Annual International Symposium on Microarchitecture, pp 75-84, November 94.

Abstract

Modulo scheduling is an efficient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirements. We present a combined approach that schedules the loop operations for minimum register requirements, given a modulo reservation table. Our method determines optimal register requirements for machines with finite resources and for general dependence graphs. This method demonstrates the potential of lifetime-sensitive modulo scheduling and is useful in evaluating the performance of lifetime-sensitive modulo scheduling heuristics.