Eric L. Boyd
Graduated: 8/95
Currently at (8/95):
Hewlett-Packard
300 Apollo Drive
M/S CHR-02 DC
Chelmsford, MA 0182
Home: (617) 935-7871
Work: (508) 436-4326
Fax: (508) 436-5135
Email: boyd@ch.hp.com
Publications
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Performance Evaluation and Improvement of Parallel Application
on High Performance Architectures
Eric L. Boyd
Ph.D. Thesis, University of Michigan.
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Modeling Computation and Communication Performance of Parallel
Scientific Applications: A Case Study of the IBM SP2
Eric L. Boyd, Gheith Abandah, Hsien-Hsin Lee, and Edward S. Davidson
Technical Report CSE-TR-236-95, University of Michigan, May 95.
Abstract
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A Hierarchical Approach to Modeling and Improving the Performance of
Scientific Applications on the KSR1
Eric L. Boyd, Waqar Azeem, Hsien-Hsin Lee, Tien-Pao Shih,
Shih-Hao Hung, and Edward S. Davidson
Proceedings of the International Conference on Parallel Processing,
August 94.
Abstract
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Communication in the KSR1 MPP: Performance Evaluation Using Synthetic
Workload Experiments
Eric L. Boyd and Edward S. Davidson
Proceedings of the International Conference on Supercomputing,
pp 166-175.
Abstract
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Evaluating the Communication Performance of MPPs Using Synthetic
Sparse Matrix Multiplication Workloads
Eric L. Boyd, John-David Wellman,Santosh G. Abraham, and Edward S. Davidson
Proceedings of the International Conference on Supercomputing, November 93.
Abstract
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Hierarchical Performance Modeling with MACS: A Case Study of
the Convex C-240
Eric L. Boyd and Edward S. Davidson
Proceedings of the 20th International Symposium on Computer Architecture,
pp 203-212, May 93.
Abstract
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KSR1 Multiprocessor: Analysis of Latency Hiding Techniques in a Sparse
Solver
Daniel Windheiser, Eric L. Boyd, Eric Hao, Santosh G. Abraham, and Edward
S. Davidson
Proceedings of the 7th International Parallel Processing Symposium,
pp 454-461, April 93.
Abstract
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