EDWARD S. DAVIDSON

Education

• Ph.D. (Electrical Engineering) University of Illinois, 1968
  
• M.S. (Communication Sciences) University of Michigan, 1962
  
• B.A. (Mathematics) Harvard University, 1961

Employment

• Honeywell,EDP, Logic Design Engineer, 1962-65
  
• University of Illinois, Research Assistant, 1965-68
  
• Stanford University, Assistant Professor of Electrical Engineering, 1968-73
  
• University of Illinois, Assistant Professor, Electrical Engineering and Coordinated Science Lab., 73-75, Associate Professor, 75-80, Professor of Electrical Computer Engineering, Coordinated Science Lab., and Computer Science, 84-87, Associate Director, Center for Supercomputing Research & Development, 85-87
  
• MIT, Visiting Scientist, Research Laboratory for Electronics, 1980
  
• University of Michigan, Chairman, Department of Electrical Engineering and Computer Science, 1988-1990
  
• University of Michigan, Professor, Department of Electrical Engineering and Computer Science, 1988-present

Honors and Awards

• Taylor L. Booth Education Award, 1996, IEEE Computer Society, "For contributions to the establishment of computer engineering as an academic discipline and for nurturing many leaders of this field during their formtive years in the profession."
• College of Engineering Excellence in Research Award, University of Michigan, 1995
• Harry Goode Memorial Award, 1992, IEEE Computer Society, "For pivotal seminal contributions to the design, implementation, and performance evaluation of high-performance computer systems."
  
• Research Excellence Award, EECS Department, University of Michigan, 1994
  
• Fellow, IEEE, 1984, "For contributions to the use of pipeline structures in computer architecture."
  
• Best Paper Award, Architecture Track of the 1991 Hawaii Intl. Conf. on System Sciences, (with W. Mangione-Smith and S. Abraham).

Research Interests

Computer architecture and design, parallel and pipeline systems, performance modeling, application performance tuning.

Recent Publications

• J. Rivers and E.S. Davidson, "Performance Issues in Integrating Temporality-Based Caching with Prefetching," Proceedings of Performance 96, October, 1996 and appears in Performance Evaluation 27 & 28 (1996) pp. 189-207.

• A. Eichenberger and E.S. Davidson, "Efficient Formulation for Optimal Modulo Schedulers," Proceedings of the ACM SIGPLAN '97 Conference on Programming Language Design and Implementation, June 1997.

• J. Rivers, E. Tam, and E.S. Davidson, "On Effective Data Supply for Multi-Issue Processors," Proceedings of the 1997 IEEE Int'l. Conference on Computer Design, October 1997.

• J. Rivers, G. Tyson, T. Austin, and E.S. Davidson, "On High-Bandwidth Data Cache Design for Multi-Issue Processors," Proceedings 30th IEEE/ACM Int'l. Symposium on Microarchitecture, pp. 46-56, December 1997.

• G. Abandah and E.S. Davidson, "Characterizing Shared Memory and Communication Performance: A Case Study of the Convex SPP1000." IEEE Transactions on Parallel and Distributed Systems, Vol. 9, No. 2, pp. 206-216, February 1998.

• G. Abandah and E.S. Davidson, "Configuration Independent Analysis for Characterizing Shared-Memory Applications," 12th Int'l. Parallel Processing Symposium, pp. 485-491, March 1998.

• G. Abandah and E.S. Davidson, "A Comparative Study of Cache-Coherent Nonuniform Memory Access Systems," 12th Annual Int'l. Symposium on High Performance Computing Systems and Applications (HPCS '98), May 1998 and High Performance Computing Systems and Applications, Kluwer Academic Publishers.

• G. Abandah and E.S. Davidson, "Effects of Architectural and Technological Advances on the HP/Convex Exemplar's Memory and Communication Performance," Proceedings 25th Int'l. Symposium on Computer Architecture (ISCA '98), June 1998.

• E. Tam, J. Rivers, G. Tyson, E.S. Davidson, "mlcache: A Flexible Multi-Lateral Cache Simulator," Proceedings of the 6th Int'l. Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS'98).

• J. Rivers, E. Tam, G. Tyson, E.S. Davidson, and M. Farrens, "Utilizing Reuse Information in Data Cache Management," Proceedings of the 12th ACM Int'l. Conference on Supercomputing, July 1998.

• J. Rivers, V. Srinivasan, G. Tyson, and E.S. Davidson, "Evaluating the Performance of Active Cache Management Schemes," Proceedings of the 1998 IEEE Int'l. Conference on Computer Design, October 1998.