Researchers
Researchers at the University of Michigan are developing an innovative and practical instruction code compression technique and supporting compiler tools that will significantly reduce the size of instruction memories for embedded microprocessors. The goal is to reduce instruction memory by at least a factor of two. In control-oriented embedded applications this can represent a total chip size reduction of 20-50%. Since cost is related to the cube of chip area, cost savings are expected be considerable. The reduction in power consumption will also be significant. The techniques developed will contribute to compiler and portability techniques for embedded systems.
The effectiveness of this method will be demonstrated on an operational micro-controller running embedded applications obtained with the help of our industrial associate, National Semiconductor Corporation. The micro-controller will be based on the ARM architecture.
Assistant: Denise DuPrie
e-mail: duprie@eecs.umich.edu
734-763-1557