EECS 270: Introduction to Altera DE2 and Quartus CAD tools
Acknowledgements:
Much of this document is taken from documents previously written for
EECS 270 and Dr. Chen's version of Engineering 100.
Overview
EECS 270 introduces you to the exciting world of digital logic design.
Digital devices have proliferated in the last quarter century and have
become essential in just about anything we do or depend on in a modern
society. Computers of all varieties are now at the heart of commerce,
communications, education, health care, entertainment, defense, etc.
Personal computers have become standard fixtures in most homes and even in
preschools. But while the computer is the most visible digital computing
device, it is by no means the only one. Embedded (invisible) digital
controllers can be found in such diverse applications as automobiles,
airplanes, elevators, cellphones, televisions, cameras, and many kitchen
appliances, to name just a tiny few. We are in the midst of a digital
revolution that is transforming our way of life in ways far more profound
than any other technological invention in the history of mankind. It is
breathtaking.
This course provides you with a basic understanding of what digital devices
are, how they operate, and how they can be designed to perform useful
functions. It forms a foundation for the more advanced hardware courses in
our curriculum. You will learn about digital design through a combination of
lectures, homework, and a hands-on laboratory. The laboratory is an integral
part of the course that shows how the theory of digital design learned in
lectures is applied in practice to construct real digital systems. This
overview document describes the equipment you will be using in the lab, the
lab procedures, and a schedule of the experiments you will be performing
throughout the semester.
Getting started...
The EECS 270 laboratory is located in room 2341 in the EECS building. Each
student will be assigned a workbench equipped with a computer connected to a
"logic board" that houses the actual digital system being designed (more on
this later.)
In this lab we will be using the Linux operating system. If you are
not familiar with it, a brief tutorial
exists which provides a solid starting point. The most important thing to
keep in mind is that you will want to create a directory for your EECS 270
labs. Open up a terminal (right-clicking on an empty spot should pull up a
menu that has "Open Terminal" as the first option). From there you can make
a directory called "EECS270" by typing:
cd
mkdir EECS270
The first command ("cd") insures that you are in your home
directory. The second creates the directory. We strongly recommend not
using spaces in your directory names (so "EECS270" not "EECS
270").
Note that you can create and verify your design on any CAEN PC which can
boot Linux (which is all of them as far as we know). You can also download
the software used in our labs to your home PC. The software does run
under Windows (and the window's version is nearly identical) but we suggest
you use the Linux software (it is faster, our documents are written
for Linux, and we can't promise that the two versions are 100% compatable.
Once over lightly
In your role as a digital logic designer you need to go through the
following steps to accomplish your job:
- Understand the required functionality of the design by reading and
interpreting a set of English language specifications. These specifications
are typically given to you by your customers; in your case, your customers
are your EECS 270 instructors who will give you written specifications for
each design in this lab. In general our lab specifications will be more
detailed and technical than real-world specifications would be.
- Apply your knowledge of how to design digital systems (which you will
hopefully acquire this semester) to translate your understanding of the
required functionality into a "paper" design. You will be using special
design automation software to help you with the mundane aspects of the
design process and to let you focus your creative energies on the more
challenging aspects. This design paradigm is commonly referred to as
Computer-Aided Design (CAD for short) and the software programs used to
assist you with design are frequently called CAD tools.
- In this lab you will be using the Quartus II CAD software. It
is available in the 270 lab, on the CAEN computers (in Linux) and can be
downloaded from the vendor. This software allows you to endter your
design and to verify it by simulation to make sure it is actually
behaving as required by the specifications. If you detect errors, you
should modify it at that point and re-simulate it.
- Implement the design by downloading it to the logic board attached to
your lab computer. The main component on this logic board is an Altera
field-programmable gate array (FPGA) integrated circuit (IC) chip consisting
of many thousands of logic building blocks that can be "wired" according to
the pattern of your specific design by appropriately opening and closing
tiny electronic switches. The miracle of software hides all of this detail;
seconds after you issue the command to download your design, the FPGA
becomes the hardware embodiment of that design.
- "Play" with your
design. The logic board contains a variety of switches (for input) and
indicators (for output) to help you apply stimuli to and observe responses
from the FPGA.
The hardware
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You will build several digital circuits this semester, ranging from
a simple function of inputs to something as complex as a computer or
controller interface. Altera's DE2 board is the vehicle you will use
to implement these circuits.
The DE2 (shown on the right; click to expand) is designed to
support a wide range of experiments. It combines a variety of logic
and I/O devices onto a single printed-circuit board and allows you to
configure and control these devices to create different applications.
The logic devices on the DE2 are an FPGA (a programmable logic device)
and several memory components (SDRAM, SRAM, and flash RAM). The I/O
devices on the DE2 are a small LCD display, numerous LEDs (lights),
and switches. In addition, the DE2 has connections to a variety of
external I/O devices, including PS/2 (keyboard and mouse), USB, VGA
(video), audio (microphone and speaker), TV, Ethernet, RS-232 (serial
port), Secure Digital and IrDA (infrared).
The DE2 board hosts a
Cyclone II FPGA with over 33,000 logic elements. In addition it
has an LCD panel, eight 7-segment displays, and a host of switches
and LEDs, not to mention VGA and audio outputs.
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The software
As mentioned above, you will be using Altera's Quartus II CAN tools to
enter, simulate and implement your design. These tools are quite complex,
and we don't expect you to become an instant master of these tools. Rather,
your skills are bound to improve over the course of the semester and with
repeated use and increased familiarity. The tools have extensive on-line
help and we will be providing a few tutorials and other forms of help to get
you stared.
- Design Entry
There are basically two methods for capturing a design: a) by drawing a
schematic diagram showing the design's components and how they are
interconnected; and b) by writing a text document that describes the
structure and behavior of the design in some appropriate notation. We will
use both methods of design entry in this course.
The schematic editor allows you to create your design by instantiating
components from one or more libraries and by wiring them together. The types
of components we will be using ranges from simple logic gates (in the first
few labs) to more complex building blocks (such as arithmetic units and data
steering logic.) You can accomplish the same task by using the an HDL. HDL
stands for Hardware Description Language. These languages are analogous to
the programming languages used to write general-purpose software, but are
usually augmented with features tures geared specifically for describing
hardware. The Cyclone II Tools support two such languages: Verilog and VHDL.
These languages two have powerful constructs that essential when you're
designing complex hardware; they are the primary HDLs used logic designers
in the semiconductor and computer industries. Most EECS classes in the
University that use and HDL use Verilog (EECS 373, 470, 427, 627) and so
that is the HDL you will be exposed to here.
- Functional Simulation
One of the advantages of computer-aided design is that you can check out the
correctness of your design before implementing it in hardware. Basically,
you "exercise" your software model of the design (the schematic or HDL
description) by applying various inputs to it and observing the resulting
outputs. This process is referred to as simulating your design. You can use
simulators to check many aspects of your design. For digital design, the two
most common classes of simulators are a) functional simulators for checking
the logical correctness of the design, and b) timing simulators for
verifying that the design works at the required speed. We will focus almost
exclusively on verifying functionality, and only briefly explore timing
simulation to get some appreciation of the temporal behavior of logic
circuits.
The Quartus tools provide a functional logic simulator that
can be invoked after a design has been entered. The simulator allows you to
define stimulators that you can apply to the inputs of your design, and to
observe the resulting logic waveforms on the outputs. Any anomalies detected
in this process should be diagnosed to determine their cause, and the design
should be modified to eliminate them (by switching back to either the
Schematic or HDL Editors). When you are satisfied that your design behaves
according to its specification, you can move to the implementation stage.
- Implementation
Implementing a design in hardware takes different routes depending on the
nature of that hardware. The choices range from off-the-shelf IC chips that
must be physically wired together, to custom-designed ICs that are
manufactured in a semiconductor fabrication facility, to a whole range of
programmable ICs with varying degrees of flexibility. In this lab, the
primary implementation medium is the Cyclone II FPGA IC chip; for some
experiments we may also interface to other external devices.
An FPGA can be programmed to implement a particular design by downloading to
it a "configuration" file that tells it how to set the state (on or off) of
tiny electronic switches (transistors) so that the structure and function of
the chip match those of the given design. The process of generating this
configuration file for a given design is quite involved, but that need not
concern us here; the Foundation tools conveniently take care of this. What
we do need to know is that the resulting configuration file is a binary file
with a ".sof" extension; it is also called an "SRAM object file" or
sometimes a "bit file".
- Programming
The actional programming of the FPGA involves downloading the "sof" file
from the PC to the FPGA. This is done by using the "In-system Memory
Content Editor", which is simply a tool to program the FPGA.
- Debugging
At this point you will have a "live" design on the logic board and you are
ready to check it by applying the various inputs from the switches and other
sources and watching the various outputs. While it should work the same as
it did in simulation, there are often bugs which only show up in a live
design. (For example you are turning on-and-off the wrong LED.) In later
labs you may have gitches or other logical errors which only are obvious in
a live design.
What we need from you
Each experiment goes through three phases which are graded separately:
pre-lab, in-lab, and post-lab. Your total grade for an experiment is
computed as a weighted sum of these three grades, the weights generally
being different for different experiments. The following subsections provide
general descriptions of what you're expected to do in each phase.
Experiment-specific pre-, in-, and post-lab requirements and their
corresponding contributions towards the total grade will be clearly spelled
out in each experiment write-up.
- Pre-Lab Requirements
Pre-lab requirements are due at the beginning of the lab period in which you
are scheduled to do the experiment (pre-lab requirements for two- and
three-period experiments may be broken down into several installments.) It
is essential that you read the pre-lab section of each experiment and do the
necessary preparatory work before coming to the lab. In most of the
experiments, the pre-lab consists of designing a logic circuit to meet a
given specification and of verifying the correctness of the design. You are
expected to carry out such design and verification using the Quartus
tools and to turn in a copy of your design (schematic or HDL) and
its simulation results to your lab GSI. If you did your work on a non-CAEN
computer, you also need to bring in your Quartus design files so that you
can transfer them to your assigned lab PC to complete the in-lab portion of
the experiment.
You should note that coming to the lab without having done all of this
preparatory work puts you at a serious disadvantage; there just is not
enough time during the lab period for you to start your design from scratch.
- In-Lab Requirements
During each three-hour lab period, you are expected to complete the hardware
portion of the experiment. For most experiments this means merely
downloading your design bitstream file to the logic board; for some
experiments, you may also need to wire some additional chips on the
breadboard. In either case, you must demonstrate the operation
of the circuit to your lab GSI. If the circuit is not behaving according to
the given specifications, you are expected to diagnose the causes of the
erroneous behavior and to make appropriate design modifications. Your in-lab
work is considered to be incomplete until your lab GSI certifies the correct
operation of your circuit.
- Post-Lab Requirements
Besides being a whiz logic designer, it is essential that you develop your
technical communication skills in order to clearly explain and document your
designs. We will help you develop these skills by requiring you to submit a
written lab report describing what you did in each experiment and providing
answers to specific questions related to the experiment. The report is due
one week after the start of the experiment. A late penalty of 10% per day
will be assessed for overdue reports; reports more than one week late will
be assessed a 90% penalty. No reports will be accepted once study days
start. Your report should be prepared with a word processor using a
readable font and spacing and it should include:
- Cover Sheet: This sheet is available as a Portable Document Format (PDF) file that can be printed from the course home page.
- Design Documentation: Here you should attach the final
(corrected) design files including, as appropriate, schematics sheets, HDL
programs, and simulation traces. If you did anything you felt was
unusual or innovative you should describe it in this section!
- Answers to specific post-lab questions: In some experiments, you
will be asked to provide answers to a list of lab-related questions as part
of your post-lab assignment.