Quartus Software Tutorial

Developed for Quartus EECS 270 at the University of Michigan
By Mark Brehob, adapted from work by Michael Kontz and Peter Chen.

  1. Purpose

    2. This tutorial steps the reader through using the Quartus II software to implement a simple logic design. It is the author's hope that after reading this tutorial the reader will be able to independently implement their own simple design such as Lab 1.

    Note: This tutorial is for the Linux toolset. The directions likely apply to the Windows version also, but have not been tested there. In lab we expect you to use the Linux toolset.

  2. Example Design Problem - Majority Voter

    3. A majority voter has three 1-bit inputs (A,B,C) and one 1-bit output (M) as seen in Figure 1. The output M takes on the majority value of the three inputs. The truth table shown in Table 1 fully illustrates its function. Whenever two or more inputs are '0' then the output M is '0'. Whenever two or more inputs are '1' then the output M is '1'.

    FIGURE 1: Symbol for Majority Gate 

    
A B C M
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
    TABLE 1: Truth Table for Majority Voter

  3. Solution to Design Problem

    4. One solution to the majority voter problem is given in Figure 2. Note that this solution may not be optimal but serves the purpose of this tutorial.


    FIGURE 2: Gate Representation of Majority Voter

  4. Quartus Software

    5. The Quartus software used in the 270 lab can also be found in CAEN labs and the Media Union.

    1. Starting Quartus II
      To begin using the Quartus software first open a terminal window. You can do so by right-clicking on an open part of the screen and selecting "Open Terminal" from the menu. In that terminal window type quartus &. The ampersand tells the terminal window to launch the application "in the background" so that the terminal can be used for other things. It may take a minute for the splash screen to come up, so be patient. If this is the first time you've used Quartus, you will be prompted to select a "view type." Use the default: Quarus II. After a bit you should see a window similar to the one in this screenshot.

      From the menu select File → New Project Wizard A screen will appear which has 3 lines of text to fill in. For the directory select any directory name, though we recommend you use something like 270labs/tutorial. For the name of the project and the top level-design entity, use "tutorial". Your window should now look like this screenshot. Select "Finish". You should be prompted if you wish to create the directory. Select "yes". You have now created a new project.

      Now you need to tell the software what type of device you will be using. Go to Assignments → device. Select "Cyclone II" as the Family and "EP2C35F672C6" as the device. If you look on the DE2 board, you will notice this is the name and device of the Altera chip. You may never need to do this step again as the software keeps track of the last device you've used. Click OK.

      Now, copy the file assignment_defaults.qdf into your project folder. This file contains default configuration data for the hardware platform (i.e. the DE2) that will implement your circuit. For the most part, this file isn't needed, but having it around does some nice things (like turning off unused outputs).

    2. Design Entry
      The first step in creating the Majority Voter is to enter the design into a schematic. To do so, select File → New... from the Menu and then select "Block Diagram/Schematic File" as shown here.

      This will launch the schematic editor. On the left side of the Schematic Editor window is a toolbar containing the different modes of the editor. To change modes simply click on the appropriate icon. You can also use the "Esc" key to go to the default "Select and Drag" mode. For this tutorial we will be using only the following three modes:

      • The "Selection and Smart Drawing Tool" (Selection mode).
      • The "Symbol Tool"
      • The "Orthogonal Node Tool" (Wiring mode)
      One common approach to beginning a schematic is to start by placing all inputs on the left and outputs on the right. Inputs and Outputs in Quartus use "pins" (input pins for inputs, output pins for outputs). Since the design calls for three inputs we will first get three input pins using the "Symbol Tool". Open the "Symbols Tool" by clicking on the "Symbols Tool" icon.

      A pop-up window titled "Symbol" will appear. Click on the "plus" sign under libraries and then on the "primitives" and finally "pin". They Symbol window should now look like this screenshot. Make sure that the "repeat insert mode" checkbox is selected. Select "input" under pins and press OK. As our circuit has three inputs, place the three input pins on the left side of the screen. Do the same thing again, but placing one output on the right side. Your design should look similar to this screenshot. Note that you can move an existing pin by switching to the selection mode. You can also delete a pin by selecting it and then pressing the "delete" key.

      Next, we wish to give these pins names. Right click on each pin and select "properties" OR double-click on the pin. Change the input names of each of the three inputs to A, B or C. Change the output pin's name to "M". The screen should now resemble this screenshot.

      Now add three 2-input AND gates and two 2-input OR gates. You will want the AND gates in a column to the right of the input pins and the OR gates to the right of them (as seen in Figure 2, above). Don't worry about the wires yet. You can select the gates by using the Symbol tool under "primitives" then "logic". You want "and2" and "or2" (see here for selecting a 2-input AND gate). Once you've added the five gates, your design should resemble this screenshot.

      This would be a good time to save your design. Select File → Save Project and respond in the affirmative to any dialog box which may come up. In general you should save your work every five minutes or so. We've had a few problems with the tool crashing.

      Next switch to wiring mode and connect the gates and pins so as to implement the function shown in Figure 2. You may find that the tool doesn't always place the wire the way you'd like. This can be a real problem when the tool ends up connecting a given wire to things you hadn't intended. The trick here is to draw the wire "part way" to where you want it and then end the wire. From that point you can then finish the wire. This can be a bit tricky and you should ask for help if things don't seem right to you. In general, if you see an "X" at the end of the wire, that means the wire isn't connected at that point. And if a wire touches an input or output, it is connected to that location. You may find this difficult to begin with and you should be using "undo" (CNTL-Z) as needed to remove mistakes. Try your best to draw your circuit so it looks like this:


      FIGURE 3: Completed majority gate

      Congratulations, you've drawn your first circuit in Quartus! There is a fair bit more to do, but you've finished the design aspect. At this time it is worth noting that there are other ways to do some of the things we've done. For example, components can also be automatically connected by wires if you place them touching one another and then drag them apart. (If this doesn't work, you should check to see that the "rubberbanding" icon is selected. You can also call up the "Symbol tool" by double-clicking openspace in the design pane (though the repeat-insert mode will not be checked by default).

      To make sure that all wires are connected and none of the components are used incorrectly you can simply pick-up each device and move it around. Its wires should stay connected (again, assuming the "rubberbanding" icon is selected.)

      This would be a good time to save the project. Quartus seems to crash every now and again. So save early and often.

    3. Simulation
      Now that the Majority Voter is completely laid out we will test its correct functionality by observing the output M when the inputs A, B, and C are given certain values. With the Quartus toolset you can provide a set of inputs to your design and check to see what outputs are generated. This is helpful in finding errors in your design.

      First you will need to compile the design. Select Tools → Complier Tool Once the window opens, you can just click "Start" but that will do a lot more than we need for functional simulation (and take a lot of time). What you can do instead is click on the "Start Analysis and Synthesis" button (shown below). If this finishes


      FIGURE 4: The "Start Analysis and Synthesis" button in the Complier Tool

      Now that the design has been compiled, you need to start the simulator. To launch the it, select Tools → Simulator Tool from the menu. Change the Simulation mode to "Functional" as shown below. open button.


      FIGURE 5: Selecting functional generation

      Now click on the button labeled "Generate Functional Simulation Netlist". Once this finishes with no errors, it pops up a report which can close (it is nice to quickly review it to see if the numbers seem right.) Each time you change your circuit and want to do functional simulation you will need to redo Analysis and Synthesis in the compiler tool AND redo the Generate Functional Simulation Netlist.

      Now press the "Open" button. In the left-hand pane, double-click. The "Insert Node or Bus" window should appear (screenshot). Press the "Node Finder..." button to get the "Node Finder" Window. The default value for the "Named" field should be "*" set the filter to be "Pins: all" (screenshot). Press "List". The pins A, B, C and M should appear in the left pane. (screenshot). Click the right double arrow between the two panes and the pins should appear in the right pane. You have now indicated that you wish the simulation to include these inputs and outputs. For later projects you may wish to simulate something other than pins. You will need to change the Filter option. Now press OK in the "Node Finder" window and OK in the "Insert Node or Bus" Window. You should now have a window that looks something like this:


      FIGURE 6: Waveform with inputs and outputs selected

      Next, you need to set the input values. Click on the pin symbol for "A". Now press the "Overwrite clock" button. Set the period to be 10ns, with the offset and duty cycle at 0 and 50% respectively (these should all be the default values). Do the same for B and C but put their periods at 20 and 40 ns respectively. Now save the "wavefile" (File → Save) as "input1" (screenshot). Once that is done, close the waveform window.

      What you've done is create a set of test inputs. If you want to reuse these input values, you can simply reuse "input1". This is very helpful---if you find errors in your design you can make changes to your schematic and then come back and run the exact same test by loading the waveform file.

      Next you need to tell the simulator to use input1 as your input file. Press the "..." button to the far right of "Simulation input:" in the Simulation tool. A "select file" dialog will appear. Select "input1" and press "Open". Now in the Simulator Tool window press "Start". (You can also do this by selecting Processing → Start Compilation or pressing CTRL-L.) About 5 seconds later the simulation should finish with a pop-up that says "Simulator was successful". Now press the "Report" button. The simulation report should appear and resemble this screenshot.

      The reason for choosing the clock periods of 10, 20, and 40ns now becomes more clear. If you look at the wave patterns for the inputs you can see that every possible value is tested, from 000 to 111. Just like a truth table. You should also be able to see that the output M behaves correctly according to the given inputs.

    4. Implementation Now that your design for a Majority Voter has proven correct, the next step is to implement the design on the Altera board. The first thing you'll need to do is tell the tools which pin you want to drive each input and output. Add the following to the end of your tutorial.qsf file: 
      set_location_assignment PIN_N25 -to A
set_location_assignment PIN_N26 -to B
set_location_assignment PIN_P25 -to C
set_location_assignment PIN_AE23 -to M
      You can check out the "assignment_defaults.qdf" file to see what these pins correspond to. DPDT_SW stands for "dipswitch" and the RED_LED is the red LED right above the dip switches. (See this pdf file for a one-page version you can quickly refer to.)

      Now open the complier tool. Click "start". The compilation should finish successfully. Invistigate any warning (other than once related to output capacitance which you should ignore).

      Quartus downloads the synthesized circuit to the FPGA via the USB cable that connects the DE2 to the computer that is running Quartus.

      First, turn on the DE2 (if it's not already on) by pressing the big red button on the upper left. This should light up the blue power LED (upper left).

      You will download the synthesized circuit via Quartus' In-System Memory Content Editor (which we call the "memory editor" for short). Start the memory editor from Quartus' Tools menu (Tools → In-System Memory Content Editor) (screenshot). You will see the following screenshot.

      The only part of the memory editor we will use for this lab is the top, right-hand corner of the memory editor (JTAG Chain Configuration). Click the Setup... button, which will bring up a dialog box (screenshot). Select USB-Blaster in the pulldown menu and click Close. Now the memory editor should look like this screenshot.

      Drag the vertical divider (just to the left of "JTAG Chain Configuration") to the left so you can see more of that part of the memory editor (screenshot). Now click the ... button (underneath "Scan Chain"), which will bring up a window to select the programming file (screenshot). Navigate to the project folder and select tutorial.sof; this file contains the low-level circuit specification you created when you compiled the circuit.

      Finally, click the blue icon to the left of tutorial.sof in the memory editor (it looks like an arrow pointing down toward a chip). This downloads the circuit onto the FPGA.

      Warning: if you don't use the In-System Memory Content Editor for a while, it often loses its connection between your computer and the DE2. You will then encounter an error if you try to download a new circuit to the FPGA (screenshot). If this happens, clicking Setup will usually reconnect your computer to the DE2. Occasionally, Quartus will crash at this point (screenshot) (this is very annoying, but unfortunately somewhat common with complex software systems). If Quartus crashes, just restart it and resume your work.

    Congratulations! You are now ready to test your design using dip switches 0, 1 and 2 LED0. It should work just like in the simulator. Making the LED reflect the majority value of the dip switches. Good luck with Lab1!

    Brief Summary of stuff to do when making a project

    1. New Project Wizard to create the project. Try to use a different directory for each project (Say 270labs/lab1, 270labs/lab2, etc.)
    2. Copy the "assignment_defaults.qdf" file into your directory. (This step can be optional, in the tutorial we never really used it.)
    3. Create and save your schematic.
    4. To do functional simulation you need to
      1. Start Analysis and Synthisis in the compiler tool
      2. Select "Functional" in the simuation tool.
      3. Press "Generate Functional Simulation Netlist" in the simuation tool.
      4. Select "Open" in the simuation tool. Then set your inputs and save the waveform file. (You'd skip this step if you already have an input file.)
      5. Set the simulation input to be the file you just saved.
      6. Press "Start" in the simulation tool.
      7. Press "Report" in the simuation tool.