EECS 370 – Exam 4 – 10 Dec 2001

 

Instructors: 

Scott Mahlke or Gary Tyson

Name:

 

 

 

UID:

 

Honor Code:   I have neither given nor received aid on this exam.

 

uniqname:

 

 

Signature:

 

 

There are 15 multiple-choice questions, each of equal value.  Each question has one correct answer. You should mark your answers on the optical grade forms provided. This is a closed book, closed notes examinations.  Don’t forget to copy your answers to compare with the key posted after the exam.

 

1.  The time it takes the disk head to move to the proper track is called?

 

a.      Track time

b.      Rotational time

c.      Transfer time

d.      Translation time

e.      Seek time

 

2. Increasing associativity generally decreases which type of cache miss?

 

a.      Conflict

b.      Capacity

c.      Compulsory

d.      Component

e.      All of the above.

 

 

3. How many data hazards exist in the following LC2K1 code executing on the 5-stage pipeline presented in lecture (with no Wbend pipeline register)? (make no assumptions about branch prediction or squashing – i.e., assume that branches may be predicted as taken or not taken and the predictor may be right or wrong)

 

                        add               1  3  3

                        beq            3  4  1

                        lw            3  6  10

                        nand            3  6  2

                        halt      

 

a.      2

b.      3

c.      4    add used by beq,lw,nand and lw used by nand

d.      5

e.      6

 

 

 

 

4. Consider a disk with the following properties:

 

3600 RPM

8 ms seek time

5 MB/s transfer rate

2 ms controller overhead

 

Assuming the characteristics of an average access, what is the largest sector size that can be read off the disk in 20ms? (Round your answer down to the nearest Kb, ie 3.2Kb or 3.6Kb = 3Kb)

 

a.      6-Kbyte

b.      8-Kbyte  8.3 to be more exact

c.      10-Kbyte

d.      12-Kbyte

e.      None, the disk access time without any transfer is already larger than 20ms.

 

 

5. How big must the frame buffer be to support true color (65536 colors) at a resolution of 1600´1200 pixels?  (Round up to the nearest MegaByte)

 

 

 

a.      1-Mbyte

b.      2-Mbyte

c.      4-Mbyte  1600´1200´4bytes

d.      8-Mbyte

e.      16-Mbyte

 

6.  A shadow mask is:

 

a.      A technique used to do reflectivity and lighting on many new 3D graphics cards.

b.      The CMOS BIOS bootup stage also called the boot sequence.

c.      The name for hardware device that controls a monitor's brightness level

d.      A hole-filled metal sheet though which electron beams are fired inside of a monitor.

e.      The technique used to lay SiO2 on a silicon wafer when creating CMOS devices.

 

 

 

 

7.  Which of the following devices cannot increase contention on a bus?

 

a.      DMA controller

b.      Second processor

c.      Disk drive

d.      Ethernet controller

e.      Parity detection circuit

 

8.  Which arbitration method can implement the most flexible arbitration algorithm?

 

a.      Daisy chained

b.      Distributed

c.      Centralized

d.      Random backoff

e.      Optimized

 

9.  Which of the following cache placements would require a TLB lookup only to satisfy a cache miss?

 

a.      Virtual cache

b.      Physical cache

c.      Virtually indexed, physically tagged cache

d.      Physically indexed, virtually tagged cache

e.      Dynamic cache

 

10.  Suppose the following ECC encoding scheme with 4 parity bits is used for 4-bit data:

 

p2 = odd_parity(d3,d2,d0)

p1 = even_parity(d2,d1)

p0 = even_parity(d1,d0)

 

Will this encoding detect and correct ALL 1-bit errors?  If not, why not?

 

a.      Yes

b.      No, it cannot correct errors in d0

c.      No, it cannot correct errors in d1

d.      No, it cannot correct errors in d2

e.      No, it cannot correct errors in d3 (is p2 or d3 wrong with bad p2 only)

 

 

 

 

 

 

 

 

11.  How many parity bits are required to detect a 1-bit error on a bus that is 16-bits wide?

 

a.      1    parity check is independent of length

b.      2

c.      3

d.      4

e.      5

 

 

12. How many ECC parity bits are required to correct a 1-bit error on a bus that is 16-bits wide?

 

a.      2

b.      3

c.      4

d.      5   1 + N + P £ 2P

e.      6

 

 

13.  How many ECC parity bits are required to correct both 1-bit and 2-bit errors on a bus that is 16-bits wide? (Note: this is the hardest question on the exam, so you may want to answer it later.  Knowing how to solve 11 and 12 can help – guessing also has a 20% chance of being right and has the added advantage of saving time.)

 

a.      8

b.      10  1 + C(N+P,1) + C(N+P,2) £ 2P  or (1 + 26 + (26´25)) £ 210

c.      16

d.      20

e.      24

                       

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Given the following characteristics and initial setup for a program running on a virtual memory system.  Use this information to answer the following 2 questions.

 

Virtual addresses: 16 bits, with a 4-bit page number and a 12-bit page offset

Page table: 8 entries

Physical memory: 4 page capacity, LRU (assume invalid pages are allocated 1,2 then 3).

 

Initial states:

Disk pages                               Page table                       Physical memory

2000: text1                               0 D2000                         0 page table

2001: text2                               1 D2001                         1

2002: text3                               2 D2002                         2

2003: Istatic1                           3 D2003                         3

                                                4 nomap

                                                5 nomap

                                                6 nomap

                                                7 nomap

 

The following reference stream (virtual addresses) is executed:

read  0000

write 6ff0

read  0004

write 3A00

read  0008

write 6744

read  2000

read  3B00

 

14. How many page faults occur?  (Hint: a page fault does NOT imply a disk transfer).

 

a.      4

b.      5 (0000,6ff0,3A00,2000,3B00)

c.      6

d.      7

e.      8

 

 

 

15. What is the physical address of the final reference (read 3B00)?

 

a.      0B00

b.      1B00 (oops, we didn’t write this carefully enough so b and e are correct)

c.      2B00

d.      3B00

e.      It is on disk, so it doesn't have a physical page number