Analog/Digital Conversion

Interfacing a microprocessor-based system to the real world.

Analog and digital signals

The bridge: Sampling Theorem

Conversion concepts

Conversion circuitry

Analog Signals

The real world is analog.

Signals vary continuously with time.

Analog signals take arbitrarily many values.

Examples:

audio signal from microphone or cassette player

video signal from VCR or video camera

x/y voltage outputs from joystick

time

x(t)

continuous

range

Digital Signals

The microprocessor world is digital.

Limited number of separate (discrete) values at each time step.

Digital signals take only these values, nothing inbetween.

Computers: Two values (0 or 1) corresponding to low/high value of electrical property (usually voltage).

In general: 2n values (n-bit representation).

time

x(t)

v1

v2

v3

v4

v5

v6

Analog vs. Digital

With digital signals, it is possible to:

Signal Conversion

To interface microprocessors to real-world (analog) systems, we need converters.

Digital to Analog Converters (DAC): Convert a digital input (e.g. binary word) to analog output (e.g. current or voltage).

Analog to Digital Converters (ADC): Convert an analog input to digital output.

analog

digital

ADC

DAC

P

mic

speaker

mechanical

mechanical

electrical

electrical

electrical

electrical

Analog to Digital Conversion

Ideal 2-bit ADC

Input range: Analog voltage between 0 and Vmax

Output: 2-bit code

0

Vmax

¾ Vmax

½ Vmax

¼ Vmax

00

01

10

11

analog

input

voltage

digital output

0

Vmax

¾ Vmax

½ Vmax

¼ Vmax

00

01

10

11

Is this any better?

Conversion of Signals over Time

Must hold input signal while converting.

“Sample and hold” circuit takes in (samples) analog value and holds it still while A to D conversion is taking place.

What is the minimum rate S at which the analog input should be sampled?

Minimum sampling rate S determines the minimum acceptable speed of A to D conversion.

Sample

and

hold

n-bit

ADC

n

analog

analog

digital

Sampling

Sampling rate must be high enough so that “no information is lost”.

What is the information of a signal?

A Simple Case

Detecting a sinusoidal signal of frequency at least f = 1/T

What is the minimum sampling rate required for detection?

T

S = 2/3 f

1/3 f

5/3 f

f

T

S = f

f

½ f

2f

Going Faster

T

f

2f

3f

Fast Enough

T

f

4f

More Than Enough

Sampling Theorem

Harmonic analysis

Signals can be expressed as weighted sums of harmonic functions.

Shannon’s Theorem (Nyquist Sampling Theorem)

To sample a bandlimited signal x(t) with no loss of information, the sampling rate must be at least twice the frequency of the highest frequency component.

Example: Audio signals typically include components up to 20KHz. CDs sample at 44.1KHz. DATs sample at 32, 44.1, or 48KHz.

Basic Converter Characteristics

Resolution: Fraction of analog range as defined by the number of bits on the digital side of the converter.

An n-bit ADC divides analog voltage range [0 , Vmax] into _____ sections and its resolution is _____ of Vmax.

Error: Difference between analog value you believe a digital value represents and what that analog value actually is.

Even ideal converters introduce some error.

Quantization Error

0

Vmax

¾ Vmax

½ Vmax

¼ Vmax

00

01

10

11

analog

input

quantization

error

Inherent in converting continuous values to a finite number of discrete values.

Every voltage in the range [1/2 Vmax , ¾ Vmax) is mapped to “01”.

To minimize worst-case error, we assume that “01” means _____ Vmax.

Worst-case error is __________ .

Absolute error depends on ___________ and ___________ .

For normalization, quantization error is expressed in terms of the ideal analog difference represented by a unit change in the digital value, referred to as LSB.

Quantization error is always equal to +/- ½ LSB.

Accuracy

0

Vmax

¾ Vmax

½ Vmax

¼ Vmax

00

01

10

11

non-linearity

Absolute non-linearity: Absolute deviation from ideal transfer curve.

Differential non-linearity: Deviation of the difference between two consecutive codes from ideal 1 LSB. An absolute non-linearity of +/- ¼ LSB results in differential non-linearity of +/- ½ LSB.

What happens if non-linearity exceeds +/- ½ LSB ?

non-linearity

non-linearity

Conversion Time

Amount of time from changing input value to output value becoming stable (typically in the ns to s range).

ADCs

Sample and hold: May (or not) rely on external sample and hold.

Averaging: Code represents average input over conversion time.

Typically provide “end of conversion” signal that can be used as an interrupt.

Trick question: To achieve sampling rate S, what is the maximum acceptable ADC conversion time?

DACs

Conversion time usually referred to as the settling time required for output to reach specified accuracy.

Most DACs can be driven faster than specified conversion rate at a corresponding loss of accuracy.

DAC #1: Voltage Divider

2-to-4 decoder

2

Din

Vout

Fast

Size (transistors, switches)?

Accuracy?

Monotonicity?

Vref

R

R

R

R

DAC #2: R/2R Ladder

D3 (MSB)

D2

D1

D0 (LSB)

2R

2R

2R

2R

R

R

R

2R

Iout

Vref

Size?

Accuracy?

Monotonicity? (Consider 0111 -> 1000)

ADC #1: Flash

Vref

R

R

R

R

Vin

+

_

priority

encoder

3

2

1

0

Vcc

2

Dout

+

_

+

_

ADC #2: Single-Slope Integration

+

_

Vin

n-bit counter

CLK

EN*

Vcc

done

Start: Reset counter, discharge C.

Charge C at fixed current I until Vc > Vin . How should C, I, n, and CLK be related?

Final counter value is Dout.

Conversion may take several milliseconds.

Good differential linearity.

Absolute linearity depends on precision of C, I, and clock.

C

I

ADC #3: Successive Approximation (1/2)

+

_

Vin

DAC

Vref

n

control

CLK

successive

approximation

register

Dout

Binary search to match input voltage.

Conversion time > n times DAC settling time.

Input should stay stable throughout conversion.

Successive Approximation Algorithm

Binary search algorithm

0. Set successive approximation register to 0

For each bit from MSB to LSB do

flip bit to 1

3. if DAC output > Vin , reset bit to 0

Example

Vref = 15V , Vin = 10V , 4 bits , binary code = voltage value

iteration	DAC out	comparison	A3A2A1A0

Noise immunity

Detection ease

Scalability

DV = Vref / 2^n

DQ = C DV

I = DQ/DT

 I DT / C = Vref / 2^n

EECS 373 Design of Microprocessor-Based Systems

2001-09-04T20:27:18