EECS 427 - VLSI Design I Fall 2009

Handouts

Tutorial 1

Tutorial 1.5

Tutorial 2

Tutorial 2.5

Hspice Power Measurement Tutorial

Abstract Editor Tutorial

Hspice Monte Carlo Tutorial

Discussion 1 Slides

Discussion 2 Slides

Discussion 3 Slides

Discussion 4 Slides

Discussion 5 Slides

Discussion 6 Slides

Discussion 7 Slides

CAD Pitfalls

MOSIS NDA for IBM 0.13um technology

Bus Naming in Cadence

Bus Tapping in Cadence

427 Project ISA and Baseline Architecture

Instruction Timing for Baseline Processor

F08 Group1 Final Report

F08 Group5 Final Report