Lectures
Lecture 1 Intro, manufacturing [1.1-1.3, 2.2, WH 3.2]
Lecture 2 Design rules and layout [2.3, insert A, WH 1.5, WH 3.3]
Lecture 3 CMOS review [5.4, 6.2]
Lecture 4 Logical effort [5.4, 6.2]
Lecture 5 Logical effort [handout]
Lecture 6 Logic styles [6.2]
Lecture 7 Logic styles [6.2]
Lecture 8 Adders [11.1-11.3.3]
Lecture 9 Shifters [11.5, WH 10.8, WH 11.4]
Lecture 10 Multipliers [11.4, WH 10.9]
Lecture 11 Power and energy [5.5]
Lecture 12 Dynamic power reduction [5.5, 11.7, CBF Ch.4]
Lecture 13 Leakage power reduction [6.4.2, CBF Ch.3]
Lecture 14 Timing [10.1-10.3]
Lecture 15 Latches and Registers [7.1-7.4]
Lecture 16 Memory core and peripherals [12.1-12.3]
Lecture 17 Memory reliability and power [12.4, 12.5]
Lecture 18 Interconnects [9.2-9.4]
Lecture 19 Advanced interconnects [9.4]