module lab3p1(
input  [17:0] SW,   //switches on FPGA
output [17:0] LEDR, //red LEDs on FPGA
//add the HEX0 display here
output  [7:0] LEDG  //green LEDs on FPGA
);

assign LEDR = SW;   //connects switch to red LEDs
assign LEDG = SW[7:0]; //connects switches to green LEDs

// instantiate the SevenSegmentDisplayDecoder

endmodule

// put the SevenSegmentDisplayDecoder module here.