EECS 573 – Term Project ======================= The term project consists in a research project of your choice, related to the material covered in class. It could involve exploring some new solutions in microarchitecture, focused on either new techniques or methodologies. It could also explore some new applications of the topics discussed in class to a different area of research. Or, it could look at optimizing an application for a particular microarchitecture. You may develop the project in groups of two or three people. Deadlines --------- Project list available: Wednesday, October 6 Project outline due and feedback meetings: Friday, October 15 Checkpoint meeting: an intermediate project meeting, dates as in the syllabus Project presentations: Wednesday, December 8 Final report draft and deliverable due: Monday, December 13 Project outline --------------- A project outline specifies the project title, members of the project team, objectives of your project, describing briefly how you are going to achieve these objectives and what will be your deliverables. The outline should also specify the relevance/novel contributions of your approach and references to related work in this area. Finally, you should include a development timeline with milestones completed by the checkpoint meeting. 2-4 paragraphs (max 1 page) will suffice. All group members must meet with the professor to review the project outline. Checkpoint meeting ------------------ Each group will have one checkpoint meeting to review project status and challenges. The group must bring all team members to give a status report indicating achievements, unresolved issues and remaining timeline for project completion. Project presentation -------------------- A 15 minute presentation on the problem you were trying to solve, motivations, objectives and the results of your work. You should also include some discussion on interesting aspects of your work, problems you encountered and interpretation of your results. Project report -------------- A final report document on your project of length max 4 pages. The deliverables also include the software you developed and/or the verification or hardware code that was part of your project. The final report document must be submitted electronically in PDF format. Important point: please include a section detailing group dynamics, which specifically states which work was done by each team member. Grading ------- The project is worth 40% of your overall grade in EECS 573. Suggested Projects ================== Possible EECS 573 projects, tune in regularly, this list is updated periodically: * One technique to create a low power SRAM, is to utilize ECC to correct voltage-related errors. One problem with this approach is that ECC cannot handle "bursts" of errors caused by spatial correlation of variation. Design an error correcting eDRAM that allows refresh the absolute weakest cells rather than whole lines, using a two-dimensional ECC structure (see Prof. Austin for additional details) * Fine-grained memory protection is a critical mechanism in the design of modern computer systems (e.g., STM, debugging, security), yet the performance of implementing such a feature is still today quite poor. Implement page-based watchpoints in the Linux kernel (Prof. Austin can provide a lot of useful information on this). Show that it can be used to perform efficient debug analysis with tools based on Valgrind and Pin. * Recently, Prof. Austin published a paper that demonstrates that RSA is attackable using transient faults. The attack was performed using voltage manipulation to inject faults into critical cryptographic-related multiplies. Each single bit fault yielded 4 bits of the RSA private key (see the RSA attack paper available from Prof. Austin's website). Perform this attack again, but this time only use heat as a mechanism to inject faults into the RSA authentication algorithm. Show that improper control of cooling in a data center could lead to private key information leaking out into the net! * design a new microarchitectural component that has significantly better performance and power characteristics than a traditional implementation; drive the project with real-program profiles, and show the advantages using detailed physical sythesis; this is a good project for those wanting to do low-level circuit design * devise a cache design that is resistant to side channel attacks, it must not be possible to determine the actions of the program from viewing the cache miss stream * devise an architecture with information protection domains, such that information can be tagged, public, protected, or private (similar to the protection domains provided by some programming languages), show that the implementation enforces the movement of data only between compatible protection domains, show how the technology can prevent security attacks * security bug: design a subtle bug for one of the processors that you designed or that we can provide to you (picojava, opensparc, verisimple, mips lite, a few 470 final project designs). The bug should be sufficiently subtle that it does not affect the normal system functionality. However it should enable a backdoor for a security attack. Develop at least one security attack made possible by your bug. This is probably a very challenging project * the introspective core: design an instruction set extension that can provide a new level of analysis into the operation of a processor; for example, it acts as a logic analyzer, or defect detector, or some other analyzer that would seem surprising/strange to implement in sofware * domain-specific processor designs: design a programmable processor for an important program domain with tight performance/power/cost constraints, e.g., * soft radio * audio codec processor * video codec processor * RF signal processor * natural I/O (speech, writing, gestures) processor * vision processor * recognition algorithms * data mining algorithms * data synthesis algorithms * etc... * architectural mechanisms for fine-grain protection: add support to the microarchitecture to support byte-grain named protection domains; demonstrate the performance of these mechanisms, and show how they can be used (e.g., program/module protection, debugging, etc...) * develop a novel simulation technology for massively multicore (and potentially heterogeneous systems), the technology must scale with more host cores, and it must provide a fair level of detailed timing simulation; for speed purposes it would be best to avoid any ISA emulation -- the prof has lots of ideas on how to approach this problem, a good project for people that like to hack * devise an application-specific architecture for quickly executing dynamically typed interpretted language (e.g., python, javascript, actionscript, etc.), in particular for the use in speeding browser processing * graceful degradation: devise an architecture with performance that degrades gracefully with defects, don't worry how to detect the defects, simply demonstrate that if they can be detected, performance can be held in proportion to the number of working components