Syllabus for EECS627 - VLSI Design II

Date (week)
Topic
Book Chapters
Project / Lab Milestones
Recitation Topics
January 7     (1)
Class overview

Lab 1 handout

January 9
Current Research Topics / Project topics



January 11
*

Lab 2 handout
Lab1 discussion
January 14   (2)
Logic effort



January 16
Design methodologies / System modeling

Project Proposal Due

January 18
*

Lab 1 due
Lab 2 discussion
January 21   (3)
MLK - no class



January 23
Logic styles - PTL / CPL logic
CBF Chapter 7


January 25
*


No recitation
January 28   (4)
Logic styles - Domino logic
CBF Chapter 8
Lab 3 handout

January 30
Noise sources and analysis
DP Chapter 6
Verification environment

February 1
*

Lab 2 due
Lab 3 discussion
February 4   (5)
ISSCC - No class



February 6
Noise avoidance techniques



February 8
*

Lab 3 due
Make file / CVS
February 11 (6) Low power design techniques

Design Review 1

February 13 Leakage current analysis
CBF Chapter 3


February 15
*


Timing Closure
February 18 (7)
Low leakage design / dual-Vt design
CBF Chapter 4


February 20
MIDTERM



February 22
*

Behavioral Verilog
Mem / Reg compilers
February 25 (8) Spring break



February 27
Spring break



March 1
Spring break



March 4     (9)
exame review / low power
DP Chapter 2


March 6
low power / leakage
CBF Chapter 4


March 8
*


Scan insertion
March 11  (10)
leakage
CBF Chapter 3


March 13
Packaging and Power supply design
DP Chapter 2


March 15
*


Q &A
March 18  (11)
Packaging and Power supply design
CBF Chapter 24


March 20
Inductance analysis
DP Chapter 3
Synopsys Synthesis

March 22
*

Design Review 2
Q &A
March 25  (12)
Inductance analysis CBF Chapter 17


March 27
Synchronization and clock design
CBF Chapter 11


March 29
*


Q &A
April 1       (13)
Synchronization and metastability
CBF Chapter 13


April 3
Process Variability
DP Chapter 10
Layout complete

April 5
*


Q &A
April 8       (14)
SOI Design I
CBF Chapter 6


April 10 SOI Design II
CBF Chapter 5
DRC / LVS

April 12
*


Q &A
April 15     (15)
SOI Design III



April 17
Final Exam



April 19 - 26
Final Presentations

Final Presentations


DP - W. Dally, J. Poulton, "Digital Systems Engineering"
CBF - A. Chandrakasan, W. Bowhill, F. Fox, "Design of High-Performance Microprocessor Circuits"

Milestones in Bold are due dates for lab assignments and project reviews/proposals, milestones in italics are suggested project milestones to help keep the projects on track.