InP HBT process schematic using base removal technique by wet etching
or ion-milling for reduced base-collector capacitance
[GaN]
[InP]
[GaAs]
[MOCVD]
[Mixer]
[Gunn (NDR)]
[PIN]
[HBTs]
[HEMTs]
[MMICs]
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Solid State Electronics Laboratory,
Department of Electrical Engineering and Computer Science,
University of Michigan
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