Smita Krishnaswamy and Stephen M. Plaza, doctoral students in Computer Science and Engineering, were awarded the Second Best Contribution Award at the Second IEEE Programming Challenge at IWLS (Int. Workshop on Logic and Synthesis), May 30-June 1, 2007 for their paper, “AnSER: A Lightweight Reliability Evaluator for use in Logic Synthesis.”

Smita and Stephen implemented a novel algorithm whose runtime scales linearly with the circuit size. The committee of judges said it showed a great deal of thought to the software architecture of their solution. It is extensible and allows the easy integration of new analysis algorithms and error models. Changes in the logic design are tracked with the oaObserver facility and computation of results is on demand.

Students participating in the Programming Challenge must implement one or more logic optimization or verification algorithms on the industrial EDA database OpenAccess. Krishnaswamy and Plaza’s implementation was described as modular and easily accessible, while taking advantage of existing OA and OAGear infrastructure including last year's simulation package. The committee believes that their work has laid the foundation for future research in circuit reliability within OAGear.

The paper is co-authored by Prof. John Hayes and Prof. Igor Markov. Krishnaswamy is co-advised by Hayes and Markov. Plaza is co-advised by Prof. Valeria Bertacco and Prof. Markov. Professor Markov served as an advisor for this year’s contest.

The contest is sponsored by the IEEE Council on Electronic Design Automation (CEDA).