Valeria Bertacco, associate professor of Computer Science and Engineering, has been awarded a 2011 IBM Faculty Award for her work in design correctness, full design validation, digital system reliability, and hardware security assurance.
Prof. Bertacco's research interests are in the functional correctness of hardware designs, focusing in the creation of novel techniques to guarantee correctness in face of functional errors and temporary and permanent transistor failures. Her present research is centered upon the development of new algorithms for hybrid verification and post-silicon validation and debug. This focus is extended to support the correctness of designs after completion and in the field, through techniques that use dynamic verification and novel reliability mechanisms to extend the lifetime of an IC design and to provide guarantees on its correct behavior, in face of the challenges posed by fragile silicon and extreme design complexity.
Before joining the department, Prof. Bertacco was a member of the Advanced Technology Group of Synopsys, a position in which she was a lead developer of Vera and Magellan, two popular verification tools. Prof. Bertacco is also an associate editor for IEEE Transactions on CAD, the author of three books, and a member of several conference program committees.
Prof. Bertacco has taught courses in Computer Architecture (EECS 370), Digital Logic Design (EECS 270), and Digital Design Verification (EECS 578). She is affiliated with the Advanced Computer Architecture Laboratory in the Computer Science and Engineering Division of the EECS Department.
About the IBM Faculty Award
The IBM Faculty Awards program is a competitive worldwide program intended to foster collaboration between researchers at leading universities worldwide and those in IBM research, development, and services organizations; and to promote courseware and curriculum innovation to stimulate growth in disciplines and geographies that are strategic to IBM.
Posted: August 4, 2011