Energy-Recycling Computer Technology from U-M Goes Global

  Bookmark and Share

Feb. 21, 2012

An energy-recycling computer circuit born at the University of Michigan will enable a new generation of power efficient laptop PCs and servers.

Global semiconductor vendor Advanced Micro Devices (AMD) announced Monday at the 2012 International Solid-State Circuits Conference (ISSCC) that the company’s forthcoming 64-bit processor core, dubbed "Piledriver," incorporates a technology invented by a Michigan Engineering computer science professor and his graduate students.

Their patented technique resulted in the launch of U-M start-up Cyclos Semiconductor in 2006. The technology, called a "resonant clock mesh," reduces the total power consumption of the processor core by up to 10 percent.  The Piledriver core will be used in multicore computer chips destined for desktops, laptops and servers.

"In such top-of-the-line processor cores, saving any amount of power without sacrificing performance has been unthinkable up until now.  And with multiple such cores used in each computer chip, total power savings can be quite substantial," said Marios Papaefthymiou, chair of computer science and engineering at U-M. Papaefthymiou is one of the developers of the technology, as well as co-founder and president of Cyclos.

For consumers, this savings will translate into improvements in performance, price, and battery life, the researchers say. For operators of large farms of computer servers, it could save hundreds of kilowatts and reduce electricity bills.

In the longer term, more aggressive versions of the technology could revolutionize chip design and enable overdue advances in performance, Papaefthymiou says.

"The evolution of computer chip performance has slowed down considerably in the past several years, and it’s all because of power constraints," he says. "Electronic devices have the capability to do more, but they cannot dissipate all the heat that would generate. Our technology allows for substantial reduction in power consumption and, therefore, heat generation, enabling designers to realize the performance potential of these devices."

Papaefthymiou’s innovation cuts energy use in the most power-hungry part of the processor – the clock that coordinates activity across the circuit. In high-performance processors, the clock can eat up 30 percent of the chip’s power. The new resonant clock mesh technology actually recycles electric charge that conventional clock designs dissipate as heat. It accomplishes this by adding to the chip inductors; that is, wire coils that can store energy in magnetic fields. These inductors, coupled with existing capacitors that store energy in electric fields, create highly efficient "tank circuits." Tank circuits are reminiscent of pendulums, swinging energy back and forth between the electric and the magnetic fields, and allowing for energy to be harvested and re-used.

When AMD begins manufacturing chips that use its Piledriver processor, it will be the first large-volume commercial deployment of a resonant clock technology.

The integration of the technology into Piledriver was performed in collaboration with Cyclos Semiconductor, a U-M startup with offices in Ann Arbor and Berkeley, Calif., founded in 2006 through the Office of Technology Transfer.

Researchers from U-M, AMD, and Cyclos presented a technical paper on the subject Monday at the International Solid-State Circuits Conference in San Francisco. The paper is titled “Resonant Clock Design for a Power-Efficient High-Volume x86-64 Microprocessor."

Story by: Nicole Casal Moore (734-647-7087)

Source: U-M Press Release

Technology from EECS Startup in New AMD Processor Family

Energy recycling technology from Cyclos Semiconductor, co-founded by CSE Chair Marios Papaefthymiou, will enable AMD's next-gen processor.

Additional Info

Prof. Marios Papaefthymiou

Resonant Clock Design for a Power-Efficient High-Volume x86-64 Microprocessor, by Visvesh Sathe, Srikanth Arekapudi, Alexander Ishii, Charles Ouyang, Marios Papaefthymiou, and Samuel Naffziger. Presented at the International Solid-State Circuits Conference, Feb. 20, 2012, San Francisco, CA.

In the News

EE Times: AMD, not ARM, first to use startup's low-power clock IP (2/21/12)

The Inquirer: AMD's Piledriver chips will use a resonant clock mesh (2/21/12)

Xbit: AMD Piledriver Chips to Conquer 4GHz Milestone Thanks to Resonant Clock Mesh Tech. (2/22/12)

TechSpot: AMD's Piledriver-based chips to feature energy-recycling tech (2/22/12)

Electronista: AMD Piledriver chips to use resonant clock mesh, top 4GHz (2/22/12)

Engadget: AMD Piledriver cores will clock over 4GHz, employ "resonant clock mesh" (2/22/12)

ExtremeTech: AMD to use resonant clock mesh to push Trinity above 4GHz (2/23/12)

MLive: Power-saving computer circuit began with UM work (3/2/12)

BBC News: AMD unveils Trinity chipsets to challenge Ivy Bridge (5/15/12)