Electrical Engineering and Computer Science

Two Papers by CSE Researchers Chosen as IEEE Micro Top Picks





Two papers authored by U-M computer science researchers have been selected for IEEE Micro's Top Picks from the 2012 Computer Architecture Conferences. Top Picks is an annual special edition of Micro magazine that acknowledges the most significant research papers from computer architecture conferences in the past year based on novelty and potential for long-term impact.

In 2013, twelve papers were selected for recognition from within three areas of impact: Energy and Efficiency, Safety and Security, and Parallelism and Memory.

Computational Sprinting

In the Energy and Efficiency area, the authors of the paper "Computational Sprinting" propose to incorporate phase-change materials directly into a processor die that provides a limited amount of thermal capacitance. This additional thermal headroom allows for short bursts, or sprints, of computation without the risk of overheating and damaging the processor. The paper was originally presented at the 18th International Symposium on High Performance Computer Architecture (HPCA), where it won the Best Paper Award. It was authored by Arun Raghavan (U Penn), Yixin Luo (U-M CE undergraduate), Anuj Chandawalla (U-M CSE Master's student), CSE Chair Marios Papaefthymiou, ME Prof. Kevin P. Pipe, Prof. Thomas F. Wenisch, and Milo M. K. Martin (U Penn).

End-to-End Sequential Consistency

In the Parallelism and Memory area, the authors of the paper "A Safety-First Approach to Memory Models" argue that recent efforts to standardize concurrency semantics in mainstream programming languages such as C++ and Java is reversing the trend towards safe languages, providing multi-threading support that subverts fundamental programming language abstractions, and makes it easy for programmers to shoot themselves in the foot in ways that are difficult to detect and correct. The paper argues for a safety-first approach that treats every memory access as potentially unsafe unless proven otherwise, and demonstrates a low-cost solution that could be realized in practice.

The paper was originally presented at the International Symposium on Computer Architecture (ISCA). It was authored by CSE PhD candidate Abhayendra Singh, Prof. Satish Narayanasamy, Daniel Marino of Symantec Research Labs, Todd Millstein of UCLA, and Madanlal Musuvathi of Microsoft Research.

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Posted: June 26, 2013