Functional Error Diagnosis, Correction and Layout Repair of Digital Circuits
Friday, August 03, 2007|
2:00pm - 4:00pm
3725 Beyster Bldg. Bldg.
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About the Event
Given the dramatic increase in design complexity of modern electronics, digital systems are often released with many latent errors --- thereby demonstrating our inability to ensure their functional correctness. While improvements in verification allow engineers to more efficiently find a larger fraction of design errors, little effort has been devoted to fixing such errors, making it an expensive and challenging task. In my dissertation we propose innovative data structures, algorithms, and methodologies that provide a fundamentally new way of solving the error-repair problem. Our contributions include: (1) Butramin, a bug trace minimizer; (2) CoRe, a counterexample-guided error-repair technique for gate-level netlists; (3) REDIR, an automatic RTL error-repair method; (4) InVerS, an incremental verification methodology for physical synthesis; (5) SymWire, a symmetry-based rewiring technique based on a new comprehensive symmetry detector; and (6) a post-silicon error-repair methodology that automatically fixes electrical and functional errors. To evaluate our techniques and promote interoperability between verification and debugging, we propose a framework, called FogClear, that integrates all these components and matches error-repair requirements at different design stages. By integrating scalable components in a unified framework, FogClear can greatly accelerate error correction, improve design quality, and reduce design cost.
Sponsor(s): I. Markov, V. Bertacco
Open to: Limited