Defense Event

Wireless Testing of Integrated Circuits

Dae Young Lee

Monday, April 16, 2012
3:00pm - 5:00pm
1005 EECS

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About the Event

Continuous scaling down of semiconductor technology enables millions of transistors to be integrated in a single die. While this leads to a gradual reduction in production cost per transistor in the integrated circuit (IC) manufacturing industry, the portion of testing cost per transistor remains almost the same or even increases with technology scaling. In order to reduce this cost, automatic testing equipment (ATE) combined with direct-contact probe cards is widely used. However, scaling trends also impose limitations on the use of ATE. These include contact point deformation and repeated abrasive cleaning of probe needles. As an alternative to conventional probe card testing, “wireless” testing has been proposed, which replaces probe needles and contact points with wireless communication circuits on the ATE and wafer. Our research, including simulation and theoretical studies has revealed that near-field wireless communication via inductive or capacitive coupling is a promising technology for short-range communication because of its efficiency in a short range. In this dissertation, two prototypes of wireless testing systems for digital ICs are presented which utilize capacitive coupling between ATE and I/O pads on a device under test (DUT). Wireless testing for analog ICs is also discussed in terms of its practicality and accuracy.

Additional Information


Sponsor(s): John P. Hayes & David D. Wentzloff

Open to: Public