Defense Event

Noise Shaping SAR ADCs

Jeffrey Fredenburg

PhD Candidate
Friday, April 17, 2015
09:00am - 11:00am
1003 EECS Bldg

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About the Event

This work investigates hybrid analog-to-digital convertors (ADCs) that combine the phenomenal energy efficiency of successive-approximation (SAR) ADCs with the resolution enhancement strategies used by noise-shaping converters. Because charge-redistribution SAR ADCs contain few active components and rely on highly digital controllers, SAR ADCs demonstrate the best energy efficiencies of all low bandwidth, moderate resolution converters, ~10 bits. SAR ADCs achieve remarkable power efficiencies at low resolution, but as the resolution of the SAR ADC increases, the specifications for input-referred comparator noise become more stringent and total DAC capacitance becomes too large, which degrades both power efficiency and bandwidth. For these reasons, lower resolution, lower bandwidth applications tend to favor traditional SAR ADC architectures, and higher bandwidth, higher resolution applications tend to favor pipeline-assisted SARs. Although the use of amplifiers in pipeline-assisted SARs relax the comparator noise requirements and improve bandwidth, amplifier design will become more of a challenge in highly scaled processes with reduced supply voltages. In this work, we explore the use of feedback and noise-shaping to enhance the resolution of SAR ADCs. Unlike pipeline-assisted SARs, which require high-gain, linear amplifiers, noise-shaping SARs can be constructed using passive FIR filter structures, which significantly relax both the amplifier gain and linearity requirements. Furthermore, the use of feedback and noise-shaping reduces the impact of thermal kT/C noise and comparator noise. This work details and explores a new class of noise-shaping SARs.

Additional Information

Sponsor(s): ECE

Faculty Sponsor: Michael P. Flynn

Open to: Public