Defense Event

Final PhD Defense

Phil Knag

Friday, October 16, 2015
3:00pm - 5:00pm
3316 EECS

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Hardware considerations for signal processing systems: A step toward the unconventional

About the Event

Signal processing algorithms are becoming more computationally intensive and power hungry while the desire for mobile products and low power devices is also increasing. An integrated ASIC solution is one of the primary ways chip developers can improve performance and add functionality while keeping the power budget low. In this talk, we discuss ASIC hardware considerations for both conventional and unconventional signal processing systems, and how integration, error resilience, emerging devices, and new algorithms can be leveraged by signal processing systems to further improve performance and enable new applications. Specifically, we will discuss signal processing hardware considerations through the use of three case studies. First, we present a highly parallel mix signal cross-correlator ASIC for a weather satellite performing real time synthetic aperture imaging. In this work, we make use of large scale mix signal integration and radiation testing insights to create a power efficient ASIC. Second, we look at an unconventional native stochastic computing architecture enabled by memristors. This work uses the non-deterministic behavior of memristors, normally seen as a negative attribute, to remove overhead of many costly random number generators required for stochastic computing. Finally, we present two unconventional sparse neural network ASICs for feature extraction and object classification. In these works, we utilize sparsity inherent to these neural network algorithms to dramatically improve performance while reducing memory bandwidth and communication bottlenecks. As improvements from technology scaling alone slow down, and the demand for energy efficient mobile electronics increases, such optimization techniques at the device, circuit, and system level will become more critical to advance signal processing capabilities in the future.

Additional Information

Sponsor(s): ECE

Faculty Sponsor: Zhengya Zhang

Open to: Public