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Defense Event

Ka-Band and W-Band Millimeter-Wave Wideband Linear Power Amplifier Integrated Circuits at 30 GHz and 90 GHz with Greater Than 100 mW Output Powers in Commercially-Available 0.12 um Silicon Germanium HBT Technology

Michael Chang


PhD Candidate
 
Friday, September 09, 2016
2:30pm - 4:30pm
3316 EECS

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About the Event

This work presents two fully-integrated power amplifiers (PA) with >100 mW output powers in commercially-available 0.12 um silicon germanium HBT technology (ft = 200 GHz, BVCEO = 1.8 V) that cover frequencies within Ka-band (26.5-40 GHz) and W-band (75-110 GHz). Compound III-V semiconductors have been traditionally favored for millimeter-wave (mmW) power generation at Ka-band and W-band, but the rapid advancement of SiGe and silicon-based foundry technologies enable fully-integrated system-on-chip solutions and wafer-scaled phased arrays for radar imaging & communication systems-- chip-level system integration that eludes traditional III-V designs. Linear power amplification is especially difficult in silicon at millimeter-wave frequencies because the limited transistor gain and low transistor breakdown voltage typically result in low output powers and efficiencies, requiring power combining for high output powers. The two 30 GHz and 90 GHz wideband, linear Class A/AB differential power amplifiers in commercial 0.12 um SiGe HBT achieve record output powers for standalone PAs without power-combining techniques. The 2.4 mmsq W-band 90-GHz power amplifier achieves a saturated output power of >100 mW (20 dBm), 14.3 dB gain with 20% fractional 3-dB bandwidth from 79-97 GHz, and peak power-added efficiency (PAE) of >15%. The 1.83 mmsq Ka-band 30-GHz power amplifier achieves a saturated output power of >100 mW, 13 dB gain with 42% fractional 3dB-bandwidth from 26-40 GHz, and peak PAE >11%. Key strategies that enable first-pass success, despite known limitations of large-signal transistor models at mmW frequencies & high output powers, include utilization of unit-cell components throughout both active & passive circuit structures; judicious use of compact lumped-element capacitors in high-pass matching networks and as resonant low-impedance RF terminations; custom RF transmission lines for low-loss shunt-stub matching and wideband quarter-wave bias-insertion networks; on-chip active bias networks with low DC impedances to delay onset of avalanche-multiplication-induced breakdown in the HBTs, thus increasing collector voltage limits; and provisions to fine-tune all biasing currents & voltages to overcome modeling inaccuracies & process variations to achieve maximum output powers even as collector voltages are pushed to 2.3 V extremes. For successful integration into larger arrays, the designs follow reliability guidelines for 100,000 power-on-hours operation at 100 C.

Additional Information

Sponsor(s): ECE

Faculty Sponsor: Co-Chairs: Prof. Amir Mortazawi and Prof. Gabriel

Open to: Public