ECE
ECE
ECE ECE


Defense Event

Cross-point Circuits for Computation, Interconnects, Security and Storage

Supreet Jeloka


PhD Candidate
 
Monday, January 09, 2017
09:30am - 11:30am
3725 Beyster Bldg

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About the Event

Limited supply-voltage scaling in newer semiconductor technology nodes, has led to an increase in power-density and stagnation of the clock frequency of microprocessors. To overcome this challenge, the trend for performance intensive parts has been to replace the power-hungry cores with a number of power-efficient simpler cores, to form a many-core system. For many-core systems the major challenge is the need to share data and hand-shaking signals between the cores. On the other hand, battery operated mobile systems have a much lower power budget but still need high performance during active mode. For mobile systems, despite the use of aggressive voltage-frequency scaling for energy efficiency, the conventional architecture still requires a large amount of energy for data movement as compared to the actual computation. Finally, on the lowest end of the energy spectrum are systems for Internet-of-Things (IoT), which mainly consist of sensor nodes that intermittently wake-up to log sensed data. Reducing data logging energy is a major challenge for IoT systems. This dissertation presents cross-point circuit-based solutions for improved energy-efficiency for each of the three systems - many-core, mobile and IoT. Cross-point circuits are array based circuits composed of small unit blocks. These unit blocks can be easily optimized for both area and energy, and then tiled together to form large scalable circuits. First, this dissertation presents a cross-point based interconnect, Hi-Rise, which is a low latency, area-energy efficient 3D switch for many-core systems. Second, it presents a configurable SRAM circuit, which can perform search and logical functions within the memory to reduce data movement. It can also be repurposed as a Physically-Unclonable-Function for hardware authentication. Finally, this dissertation presents two non-volatile memory design solutions for IoT systems – a flash memory and a Ferroelectric-RAM, both of which use charge recycling techniques for ultra-low energy data writing.

Additional Information

Sponsor(s): ECE

Faculty Sponsor: Prof. David Blaauw

Open to: Public