A 14mW Fractional-N PLL Modulator With an Enhanced Digital Phase Detector and Frequency Switching Scheme
Tuesday, January 16, 2007|
3:30pm - 4:30pm
|Mark Ferris, Graduate Student, University of Michigan
About the Event
The fractional-N frequency synthesizer is a key building block of wireless systems as it can both generate a high frequency signal with a well-defined frequency, and modulate that signal. This work addresses two limitations of this architecture; the reliance on analog circuitry in deep sub-micron technology, and the trade off between low loop bandwidth for good ?? noise rejection, and high loop bandwidth for fast modulation rates. We present a synthesizer that utilizes a novel, all-digital phase detector in place of the conventional analog-intensive phase detector, charge pump, and loop filter blocks. In addition, the design uses a digital dual-modulation scheme that alleviates the tradeoff between loop bandwidth and switching speed. These techniques are presented as part of a prototype 14mW 2.2GHz MSK transmitter with a transmission rate of 927.5kbit/s.
Mark Ferriss graduated with first class honors in electrical engineering from University College Cork, Cork, Ireland, in 1998, and received an M.S.E. degree from the University of Michigan, Ann Arbor, in 2005. He is currently working toward the Ph.D. degree at the University of Michigan. From 1998 to 2002, he worked at Analog Devices, Limerick, Ireland, during which time he worked on a variety of projects including DACs, switches, controllers, and PLLs for fiber-optic communications. His interests include RF communication circuits and analog-to-digital interface circuits.
Contact: Peggy Henderson
Sponsor: WIMS ERC Seminar Series
Open to: Public
Web Page: http://wimserc.org