Logic Synthesis

Research Areas -> Computer-Aided Design and VLSI -> Logic Synthesis
 
Overview
Most of the digital systems are designed at the Register Transfer Level (RTL) today, and must be compiled into digital circuits. We are working to improve these logic synthesis tools in terms of speed, quality of results, as well as support for new optimizations and design styles. We are also pursuing physical synthesis, which modifies the structure of a circuit based on its placement, as well as the need to verify synthesis transformations for correctness.
 
Faculty
Hayes, John P.
Markov, Igor
Sakallah, Karem A.


Related Labs, Centers, and Groups
Advanced Computer Architecture Laboratory


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