StressTest
StressTest is a directed-random test generator for hardware verification. It consists of a Markov-model random instruction generator and activity monitors. The model is generated from the user specified template programs and is used to generate the instructions sent to the design under test (DUT). In addition, the user specifies key activity points within the design that should be stressed and monitored throughout the simulation. The StressTest engine then uses closed-loop feedback techniques to transform the Markov model into one that effectively stresses the points of interest. In parallel, StressTest monitors the correctness of the DUT response to the supplied stimuli, and if the design behaves unexpectedly, a bug and a trace that leads to it are reported.
Disclaimer: the authors do not warrant or assume any legal liability or responsibility for the accuracy, completeness, or usefulness of this software, nor for any damage derived by its use.