[English version]
姓名：張凱揮(照片)
生日：1976/12/10
血型：O
出生地：臺灣省臺南市
籍貫：臺中縣東勢鎮

我的興趣
基本上來說，我最大的興趣就是坐在電腦前面寫程式！
我還對研究聲韻學、中國的方言很有興趣。

我的專長
語言：會聽及說國語、客家話、英語，會聽閩南語，略通日文及廣東話。
程式語言：LOGO, Basic, QB, Pascal, C, C++, Perl, JAVA及 8086組合語言，略通Lisp,
Smalltalk及Ada。能使用Delphi, MFC, STL。
其他：中文輸入每分鐘65字檢定合格、日本語能力測驗三級檢定合格、製作homepage、
80186,80188 based embedded system。


學、經歷
仁愛國小，市長獎畢業
仁愛國中（一年級）
敦化國中（二、三年級），市長獎畢業
建國中學，畢業時穫建中三等獎章
國立臺灣大學電機工程學系第三名畢業
國立臺灣大學電機工程研究所CAD/VLSI組碩士班畢業，指導教授：郭斯彥
美國密西根大學安娜堡分校，電腦科學及工程博士，指導教授： Igor Markov, Valeria Bertacco

揚智科技暑期工讀生(1999/7-1999/9)
亞睿系統設計公司軟體工程師(2001/9-2003/6)
亞睿系統設計公司專案經理(2003/7-2004/8)

中央研究院高中生物班研習兩年
臺北市程式設計比賽優勝(81,82學年度)
國際資訊奧林匹亞研習營(82學年度)
地球科學學科能力競試北市及全國一等獎(82學年度)
資訊學科能力競試北市一等獎全國三等獎(83學年度)
參加紐西蘭科展(83學年度)
教育部舉辦首頁建置競賽入選獎(85,86學年度)
惠普盃homepage大賽第三名(86學年度)
網際網路創意應用競賽優等獎(87學年度)
網際網路創意應用競賽佳作獎(88學年度)
IC/CAD程式設計比賽佳作獎(88學年度)
IC/CAD程式設計比賽特優獎(89學年度)
代表密西根大學參加ICCAD Cadathlon程式設計比賽(2004)
International Workshop on Logic and Synthesis (IWLS) Implementation Challenge 第一名(2006)
ICCAD CADathlon比賽第二名(2006)

盧祺鴻獎學金(83學年度)
潘文淵獎學金(85,87學年度)
國際航電獎學金(86,87學年度)
龍山寺獎學金(86學年度)
書卷獎(84年上下學期, 86年上學期, 87年上學期)
教育部A類獎學金(88, 89學年度)

建中資訊社社長
夢幻空間資訊站(Fantastic Zone BBS)站長
臺大客家社電腦部、文宣部

發表文章

學位論文

期刊
  1. K. H. Chang, D. A. Papa, I. L. Markov, V. Bertacco, "InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization", to appear in IEEE Design and Test of Computers, 2008.
  2. K. H. Chang, I. L. Markov and V. Bertacco, "Automating Post-Silicon Debugging and Repair", IEEE Computer, vol. 41, no. 7, Jul. 2008, pp. 47-54.
  3. K. H. Chang, I. L. Markov, V. Bertacco, "SafeResynth: A New Technique for Physical Synthesis", Integration: the VLSI Journal, Jul, 2008, pp. 544-556.
  4. K. H. Chang, I. L. Markov, V. Bertacco, "Fixing Design Errors with Counterexamples and Resynthesis," IEEE Trans. on Computer-Aided Design, Jan. 2008, pp. 184-188
  5. K. H. Chang, I. L. Markov and V. Bertacco, "Post-placement Rewiring by Exhaustive Search for Functional Symmetries," ACM Transactions on Design Automation of Electronic Systems, Vol. 12, No. 3, Article 32, Aug. 2007
  6. K. H. Chang, V. Bertacco and I. L. Markov, "Simulation-based Bug Trace Minimization with BMC-based Refinement," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 26, NO. 1, Jan. 2007, pp. 152-165
  7. 張凱揮、范潤萃、郭斯彥，國客語翻譯及讀稿系統之設計與實作, 客家文化研究通訊第七期, 國立中央大學客家研究中心, 2005, pp. 152-168
  8. 張凱揮、范潤萃、郭斯彥，用聽的瀏覽器，網際網路技術學刊，2001年7月，pp 171-176
  9. 張凱揮，客、華語和日文漢字音讀關係之研究及應用，台灣語言與語文教育期刊第二期，新竹師範學院臺灣語言所，2000年，pp 79-90
  10. 張凱揮，遠端家電控制及保全系統之實作及分析，中華民國資訊學會通訊第二卷第二期，1999年6月
  11. 張凱揮，如何用其他語言幫助學習客語，客家雜誌108期，1999年6月
  12. 張凱揮，客語有聲字典及客語輸入法，客家雜誌88期，1997年10月

學術會議
  1. K. H. Chang, V. Bertacco, I. L. Markov, and A. Mishchenko, "Synthesis with External Don't-Cares Using Shannon Entropy and Craig Interpolation", ACM/IEEE Int'l Workshop on Logic and Synthesis (IWLS), Lake Tahoe, CA, 2008
  2. K. H. Chang, I. L. Markov, and V. Bertacco, "Reap What You Sow: Spare Cells for Post-Silicon Metal Fix", Int'l Symposium on Physical Design (ISPD), Portland, OR, 2008, pp. 103-110.
  3. K. H. Chang, I. Wagner, V. Bertacco, and I. L. Markov, "Automatic Error Diagnosis and Correction for RTL Designs", IEEE Int'l High Level Design Validation and Test Workshop (HLDVT), Irvine, CA, Nov. 2007, pp. 65-72.
  4. K. H. Chang, I.L. Markov and V. Bertacco, "Automating Post-Silicon Debugging and Repair," Proc. Int'l Conf. on Computer-Aided Design (ICCAD), San Jose, CA, November 2007, pp. 91-98.
  5. K. H. Chang, I. Wagner, V. Bertacco, and I. L. Markov, "Automatic Error Diagnosis and Correction for RTL Designs", ACM/IEEE Int'l Workshop on Logic and Synthesis (IWLS), San Diego, CA, May 2007, pp. 106-113.
  6. K. H. Chang, I. L. Markov, and V. Bertacco, "Automating Post-Silicon Debugging and Repair", ACM/IEEE Int'l Workshop on Logic and Synthesis (IWLS), San Diego, CA, May 2007, pp. 114-121.
  7. K. H. Chang, I. L. Markov, and V. Bertacco, "Fast Verification of Retiming", ACM/IEEE Int'l Workshop on Logic and Synthesis (IWLS), San Diego, CA, May 2007, pp. 165-166.
  8. K. H. Chang, D. A. Papa, I. L. Markov and V. Bertacco, "InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization", Proc. Int'l Symposium on Quality Electronic Design (ISQED) San Jose, CA, March 2007, pp. 487-492
  9. K. H. Chang, I. L. Markov and V. Bertacco, "Safe Delay Optimization for Physical Synthesis", Proc. Asia and South Pacific Design Automation Conf. (ASPDAC), Yokohama, Japan, January 2007, pp. 628-633.
  10. S. Plaza, K. H. Chang, I. L. Markov and V. Bertacco, "Node Mergers in the Presence of Don't Cares", in Proc. Asia and South Pacific Design Automation Conf. (ASPDAC), Yokohama, Japan, January 2007, pp. 414-419.
  11. K. H. Chang, I. L. Markov and V. Bertacco, "Fixing Design Errors with Counterexamples and Resynthesis", in Proc. Asia and South Pacific Design Automation Conf. (ASPDAC), Yokohama, Japan, January 2007, pp. 944-949.
  12. K. H. Chang, D. A. Papa, I. L. Markov and V. Bertacco, "Fast Simulation and Equivalence Checking Using OAGear", ACM/IEEE Int'l Workshop on Logic and Synthesis (IWLS), Denver, CO, June 2006, pp. 270-271.
  13. K. H. Chang, I. L. Markov and V. Bertacco, "Keeping Physical Synthesis Safe and Sound", ACM/IEEE Int'l Workshop on Logic and Synthesis (IWLS), Denver, CO, June 2006, pp. 86-93.
  14. K. H. Chang, I. L. Markov and V. Bertacco, "Post-Placement Rewiring and Rebuffering by Exhaustive Search For Functional Symmetries," Proc. Int'l Conf. Computer-Aided Design (ICCAD), 2005, pp. 56-63.
  15. K. H. Chang, V. Bertacco and I. L. Markov, "Simulation-based Bug Trace Minimization with BMC-based Refinement," Proc. Int'l Conf. Computer-Aided Design (ICCAD), 2005, pp. 1045-1051.
  16. K. H. Chang, J. Y. Kang, H. W. Wang, W. T. Tu, Y. J. Yeh and S. Y. Kuo, "Automatic Partitioner for Behavior Level Distributed Logic Simulation," Proc. Int'l Conf. Formal Techniques for Networked and Distributed Systems (FORTE), Oct. 2005, Taipei, Taiwan, LNCS 3731, pp 525-528
  17. K. H. Chang, I. L. Markov and V. Bertacco, "Post-Placement Rewiring and Rebuffering by Exhaustive Search for Functional Symmetries," ACM/IEEE Int'l Workshop on Logic and Synthesis (IWLS), Lake Arrowhead, CA, June 2005, pp. 469-476.
  18. K. H. Chang, W. T. Tu, H. W. Wang, Y. J. Yeh, and S. Y. Kuo, "Techniques to Reduce Synchronization in Distributed Parallel Logic Simulation," Proceedings of the 16th IASTED International Conference on Parallel and Distributed Computing and Systems(PDCS'04), November 2004, Cambridge, MA, USA
  19. K. H. Chang, W. T. Tu, Y. J. Yeh, and S. Y. Kuo, "A Temporal Assertion Extension to Verilog," Proceedings of the 2nd International Symposium on Automated Technology for Verification and Analysis(ATVA04), October 2004, Taipei, Taiwan, LNCS 3299, pp 499-504
  20. C. C, Yu, K. H. Chang, Y. J. Yeh, and S. Y. Kuo, "System Level Assertion-Based Verification Environment for PCI/PCI-X and PCI-Express," VLSI Design/CAD Symposium, Taiwan, 2004
  21. K. H. Chang, W. T. Tu, Y. J. Yeh, and S. Y. Kuo, "Techniques to Reduce Synchronization in Distributed Parallel Logic Simulation," VLSI Design/CAD Symposium, Taiwan, 2004
  22. K. H. Chang, H. W. Wang, Y. J. Yeh, and S. Y. Kuo, "Automatic Partitioner for Distributed Parallel Logic Simulation," IASTED International Conference on Modelling, Simulation and Optimization(MSO'04), Kauai, Hawaii, USA, 2004
  23. K. H. Chang, W. T. Tu, Y. J. Yeh, and S. Y. Kuo, "A Simulation-Based Temporal Assertion Checker for PSL," IEEE International Midwest Symposium on Circuits and Systems(MWSCAS'03), Cairo, Egypt, 2003
  24. K. H. Chang, W. T. Tu, Y. J. Yeh, and S. Y. Kuo, "A Tag-Augmented Temporal Logic Checker," VLSI Design/CAD Symposium, Taiwan, 2003
  25. K. H. Chang, Y. C. Su, W. T. Tu, Y. J. Yeh, and S. Y. Kuo, "A PCI-X Verification Environment Using C and Verilog," VLSI Design/CAD Symposium, Taiwan, 2003
  26. Y. J. Yeh, K. H Chang, M. T. Chen, and S. Y. Kuo, "Compiled-code Technique for RTL Designs," VLSI Design/CAD Symposium, Taiwan, 2001

其它
  1. K. H. Chang, J. Y. Kang, C. L. Huang, J. P. Hayes and I. L. Markov, "Fast Test Simulation via Distributed Computing," Technical paper, Avery Design Systems, 2006

我的作品
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Last updated:2006/10/22
 Email address: changkh@umich.edu