I am currently a senior graduate student at the University of Michigan, where I am
getting my PhD in Computer Science. I work with my
advisors, Steve Reinhardt (now at AMD Labs)
and Trevor Mudge on scalable techniques for
managing the shared cache resource in large scale chip
multiprocessors. I got my start on the topic after an
internship at Intel in Hillsboro, Oregon in 2005
working with Ravi Iyer. Prior to that, I worked with
Nathan Binkert (now at HP Labs) on his work with SINIC
(Simple Integrated Network Interface Controller) and
developing M5, a modular, flexible, full-system
architectural simulator capable of booting Linux on a
variety of architectures.
I was funded during my first four years with a Bell Labs
Graduate Research Fellowship. I am currently funded with an
Intel Fellowship.
Before graduate school, I did my undergrad at Princeton University where I graduated
cum laude with a degree in Electrical
Engineering. During college, one of my goals was to
figure out how a computer worked from top to bottom,
layer by layer. I discovered that the layer that
interested me the most was the architecture layer. I
credit one of my professors at Princeton, Margaret Martonosi, with sparking my
interest in the field.
In my free time, I like to cook, read, knit, and do
triathlons.
Here's a copy of my CV.