David A. Papa

School: University of Michigan Lab: Advanced Computer Architecture Laboratory Field of Study: Computer Science & Engineering Current Status: Ph.D. Candidate Curriculum Vitae: (.rtf) (.ps) (.pdf) Degrees: B.S.E. Computer Engineering, University of Michigan, 2002 M.S.E. Computer Science and Engineering, University of Michigan, 2004 Major Software I've Worked On: UMpack / Capo An open-source robust academic VLSICAD placement tool. OpenAccess Gear An open-source tool-kit for OpenAccess(cached) 2.2 development Includes: Graphical User Interface (Screenshot .png (83K) .jpg (238K) .gif (2.0M) ) Layout viewer Schematic viewer Static timing analyzer Plug-in to the Capo placer Contact: iamyou@eecs.umich.edu Advisor: Igor L. Markov My Erdös Number is 4 (through Igor L. Markov)

Publications

In Books:

• J. A. Roy, D. A. Papa and I. L. Markov, ``Capo: Congestion-aware Placement for Standard-cell and RTL Netlists with Incremental Capability'' (.pdf), in Modern Circuit Placement: Best Practices and Results, G.-J. Nam and J. Cong, eds; Springer, 2007. (ISBN: 038736837X)
• D. A. Papa and I. L. Markov, ``Hypergraph Partitioning and Clustering'' (.pdf) in Approximation Algorithms and Metaheuristics, T. Gonzalez, ed.; pages 61-1 through 61-19, CRC Press, CRC Press, 2007.

Journals and magazines:

• D. A. Papa, T. Luo, M. D. Moffitt, C. N. Sze, Z. Li, G.-J. Nam, C. J. Alpert and I. L. Markov, ``RUMBLE: An Incremental, Timing-driven, Physical-synthesis Optimization Algorithm'' (.pdf), IEEE Trans. on Computer-Aided Design 2008, vol. 27, no. 12, pp. 2156-2168.
• J. A. Roy, D. A. Papa, I. L. Markov, ``Fine Control of Local Whitespace in Placement,'' to appear in VLSI Design, 2009.
• K.-H. Chang, D. A. Papa, I. L. Markov, V. Bertacco, ``InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization'' (.pdf), to appear in IEEE Design and Test of Computers, 2008.
• J. A. Roy, S. N. Adya, D. A. Papa and I. L. Markov, ``Min-cut Floorplacement'' (.pdf), IEEE Trans. on Computer-Aided Design, vol.25, no.7, pp. 1313-1326, July 2006.

Conference and workshop proceedings:

• Tao Luo, David A. Papa, Zhuo Li, Cliff C. N. Sze, Charles J. Alpert and David Z. Pan, ''Pyramids: An Efficient Computational Geometry-based Approach for Timing-driven Placement,'' to Appear in Proc. International Conference on Computer Aided Design (ICCAD) 2008. (best paper award finalist)
• Michael D. Moffitt, David A. Papa, Zhuo Li, Charles J. Alpert ``Path Smoothing via Discrete Optimization,'' (.pdf) Design Automation Conference (DAC) pp. 724-727, Anaheim, CA, July 2008.
• D. A. Papa, T. Luo, M. D. Moffitt, C. N. Sze, Z. Li, G.-J. Nam, C. J. Alpert and I. L. Markov, ``RUMBLE: An Incremental, Timing-driven, Physical-synthesis Optimization Algorithm'' (.pdf), Int'l Symposium on Physical Design (ISPD), pp. 2-9, Portland, Oregon, 2008.
• K.-H. Chang, D. A. Papa, I. L. Markov and V. Bertacco, ``InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization'' (.pdf), Proc. Int'l Symposium on Quality Electronic Design (ISQED), pp. 487-492, San Jose, CA, March 2007.
• J. A. Roy, D. A. Papa, A. N. Ng, I. L Markov, ``Satisfying Whitespace Requirements in Top-down Placement'' (.pdf), Proc. Int'l Symp. on Physical Design (ISPD), pp. 206-208, San Jose, CA, April 2006.
• D. A. Papa, I. L. Markov and P. Chong, ``Utility of OpenAccess in Academic Research'' (.pdf), Proc. Asia and South Pacific Design Automation Conference (ASPDAC), pp. 440-441, Yokohama, Japan, January 2006.
• J. A. Roy, D. A. Papa, S. N. Adya, H. H. Chan, J. F. Lu, A. N. Ng, I. L. Markov, ``Capo: Robust and Scalable Open-Source Min-cut Floorplacer'' (.pdf), Proc. Intl. Symposium on Physical Design (ISPD), pp. 224-227, San Francisco, April 2005.
• Zh. Xiu, D. A. Papa, P. Chong, A. Kuehlmann, Rob A. Rutenbar, Igor L. Markov, ``Early Research Experience with OpenAccess Gear: An Open Source Development Environment for Physical Design'' (.pdf), Proc. Intl. Symposium on Physical Design (ISPD), pp. 94-100, San Francisco, April 2005.
• S. N. Adya, S. Chaturvedi, J. A. Roy, D. A. Papa and I. L. Markov, ``Unification of Partitioning, Floorplanning and Placement'' (.pdf, slides), Intl. Conf. Computer-Aided Design (ICCAD), San Jose, CA, November 2004, pp. 550-557.
• D. A. Papa, S. N. Adya and I. L. Markov, ``Constructive Benchmarking for Placement'' (.pdf), Proc. Great Lakes Symp. on VLSI (GLSVLSI), Boston, Massachusetts, April 2004, pp. 113-118.

Invited Talks:

• D. A. Papa, K.-H. Chang, I. L. Markov, and V. Bertacco, ``Fast Simulation and Equivalence Checking Using OpenAccess'' (.pdf), the Open Access conference (OA), San Jose, CA, November 2006.
• J. A. Roy, D. A. Papa, J. F. Lu, A. N. Ng, I. L. Markov, ``Tool Development For Multi-Million Gate Designs'' (.pdf), workshop on Electronic Design Processes, 2005.

Workshops without proceedings:

• K.-H. Chang, D. A. Papa, I. L. Markov and V. Bertacco, ``Fast Simulation and Equivalence Checking Using OAGear'' (.pdf), International Workshop on Logic Synthesis (IWLS), pp. 270-271, Denver, CO, June 2006.