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| All Publications |
Journal Articles
| | J. Lee, J. Kang, S. Park, J. Seo, J. Anders, J. Guilhereme and M. P. Flynn, “A 2.5mW 80dB
DR 36dB SNDR 22MS/s Logarithmic Pipeline ADC,” IEEE Journal of Solid State Circuits, to appear October 2009. |
| J. Park, J. Kang, S. Park, and M. P. Flynn, “A 9Gbit/s Serial Transceiver for On-chip Global
Signaling over Lossy Transmission Lines,” IEEE Transactions on Circuits and Systems I, to appear October 2009. |
| M. A. Ferriss and M. P. Flynn, “A 14 mW Fractional-N PLL Modulator With a Digital Phase Detector and Frequency Switching Scheme,” IEEE Journal of Solid-State Circuits, Vol. 43, No. 11, pp. 2464-2471, November 2008. |
| S. Park, Y. Palaskas, and M. P. Flynn, “A 4 GS/s 4 bit Flash ADC in 0.18µm CMOS,” IEEE Journal of Solid-State Circuits, Vol. 42, No. 9, pp. 1865-1872, September 2007. |
| J. Chen, M. P. Flynn, and J. Hayes, “A Fully Integrated Auto-Calibrated Super-Regenerative Receiver in 0.13 µm CMOS,” IEEE Journal of Solid-State Circuits, Vol. 42, No. 9, pp. 1976-1985, September 2007. |
| S. Park and M. P. Flynn, “A Regenerative Comparator Structure with Integrated Inductors,” IEEE Transactions on Circuits and Systems I, Vol. 53, No. 8, pp. 1704-1711, August 2006. |
| F. Kocer and M. P. Flynn, “An RF Powered, Wireless CMOS Temperature Sensor,” IEEE Journal of Sensors, Vol. 6, No. 3, pp. 557-564, June 2006. |
| F. Kocer and M. P. Flynn, “A New Transponder Architecture with On-Chip ADC for Long-Range Telemetry Applications,” IEEE Journal of Solid-State Circuits, Vol. 41, No. 5, pp. 557-564, May 2006. |
| M. P. Flynn, S. Park, and C. C. Lee, Achieving Analog Accuracy in Nanometer CMOS,” International Journal of High Speed Electronics and Systems, Vol. 15, No. 2, pp. 255-275, 2005. |
| M. P. Flynn, C. Donovan, and L. Sattler, “Digital Calibration Incorporating Redundancy of Flash ADCs,” IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 50, No.5, pp. 205-214, May 2003. |
| C. Donovan and M. P. Flynn, “A "digital" 6-bit ADC in 0.25-um CMOS,” IEEE Journal of Solid-State Circuits, Vol. 37, No. 3, pp. 432-437, March 2002. |
| D. J. Foley and M. P. Flynn, “A low-power 8-PAM serial transceiver in 0.5-um digital CMOS,” IEEE Journal of Solid-State Circuits, Vol. 37, No. 3, pp. 310-316, March 2002. |
| D. J. Foley and M. P. Flynn, “CMOS DLL based 2V, 3.2ps jitter, 1GHz clock synthesizer and temperature compensated tunable oscillator,” IEEE Journal of Solid-State Circuits, Vol. 36, No. 3, pp. 417-423, March 2001. |
| M. P. Flynn and B. Sheahan, “A 400-Msample/s, 6-b CMOS Folding and Interpolating ADC,” IEEE Journal of Solid State Circuits, Vol. 33, No. 12, pp. 1932-1938, December 1998. |
| M. P. Flynn and D. J. Allstot, “CMOS folding A/D converters with current-mode interpolation,” IEEE Journal of Solid-State Circuits, Vol. 31, No. 9, pp. 1248-1257, September 1996. |
| M. P. Flynn and S. Lidholm, “A 1.2 um CMOS current controlled oscillator,” IEEE Journal of Solid-State Circuits, Vol. 27, No. 7, pp. 982-987, July 1992. |
Book Chapters
| | M. P. Flynn, S. Park, and C.C. Lee, “Achieving Analog Accuracy in Nanometer CMOS,” in Design of High-Speed Communication Circuits, Ed. Ramesh Harjani, World Scientific Publications, New Jersey, 2006. |
| D. J. Foley and M. P. Flynn, “CMOS DLL-Base 2-V 3.2-ps Jitter 1-GHz Clock Synthesizer and Temperature-compensated Tunable Oscillator,” in Phase-Locking in High-Performance Systems, Ed. Behzad Razavi, IEEE Press, Piscataway, NJ, pp. 493-498, 2003. |
Conference Papers
| | M. Ferriss, D. Lin, and M. P. Flynn, “A Fractional-N PLL Modulator with Flexible Direct Digital Phase Modulation,” to be presented at the IEEE Custom Integrated Circuits Conference (CICC), September 2009. |
| J. Kang, and M. P. Flynn, “A 12b 11MS/s Successive Approximation ADC with Two Comparators in 0.13m CMOS,” IEEE Symposium on VLSI Circuits, June 2009. |
| S. Naraghi, M. Courcy, and M. P. Flynn, “A 9bit 14µW 0.06mm2 Pulse Position Modulation ADC in 90nm Digital CMOS,” IEEE International Solid State Circuits Conference (ISSCC), February 2009. |
| J. Kang, D. Lin, L. Li, and M. P. Flynn, “A Reconfigurable FIR Filter Embedded in a 9b Successive Approximation ADC,” IEEE Custom Integrated Circuits Conference (CICC), September 2008. |
| J. Park, J. Kang, S. Park, and M. P. Flynn, “A 9Gbit/s Serial Transceiver for On-chip Global Signaling over Lossy Transmission Lines,” IEEE Custom Integrated Circuits Conference (CICC), September 2008. |
| J. Lee, H. Rhew, D. Kipke and M. P. Flynn, “A 64 Channel Programmable Closed-loop Deep Brain Stimulator with 8 Channel Neural Amplifier and Logarithmic ADC,” IEEE Symposium on VLSI Circuits, June 2008. |
| D. Shi, N. Behdad, J. Chen, and M. P. Flynn, “A 5GHz Fully Integrated Super-regenerative Receiver with On-chip Slot Antenna in 0.13µm CMOS,” IEEE Symposium on VLSI Circuits, June 2008. |
| C. C. Lee and M. P. Flynn, “A 14b 23MS / s 48mW Resetting SD ADC with 87dB SFDR 11.7b ENOB & 0.5mm2 area,” IEEE Symposium on VLSI Circuits, June 2008. |
| D. Shi and M. P. Flynn, “A Compact 5GHz Q-enhanced Standing-Wave Resonator-based Filter in 0.13µm CMOS,” IEEE MTT-RFIC, June 2008. |
| I. Bogue and M. P. Flynn, “A 57dB SFDR Digitally Calibrated 500MS/s Folding ADC in 0.18µm,” Custom Integrated Circuits Conference (CICC), September 2007. |
| D. Shi, J. East, and M.P. Flynn, “A Compact 5GHz Standing-Wave Resonator-based VCO in 0.13µm CMOS,” IEEE Radio Frequency Integrated Circuits Conference (RFIC 2007), Honolulu, Hawaii, June 2007. |
| N. Behdad, D. Shi, W. Hong, K. Sarabandi, and M. P. Flynn, “A 0.3mm² Miniaturized X-Band On-Chip Slot Antenna in 0.13µm CMOS,” IEEE Radio Frequency Integrated Circuits Conference (RFIC 2007), Honolulu, Hawaii, June 2007. |
| J. Lee, S. Park, J. Kang, J. Seo, J. Anders, and M. P. Flynn, “A 2.5 mW 80dB DR 36dB SNDR 22MS/s Logarithmic Pipeline ADC,” IEEE Symposium on VLSI Circuits, June 2007. |
| M. Ferriss and M. P. Flynn, “A 14mW Fractional-N PLL modulator with a novel digital phase detector and frequency switching scheme,” IEEE International Solid State Circuits Conference (ISSCC), February 2007. |
| J. Y. Park and M. P. Flynn, “A Low Jitter Multi-Phase PLL with Capacitive Coupling,” Custom Integrated Circuits Conference (CICC), September 2006. |
| S. Park, Palaskas, A. Ravi, R. Bishop and M. P. Flynn, “A 3.5 GS/s 5-b Flash ADC in 90 nm CMOS,” Custom Integrated Circuits Conference (CICC), September 2006. |
| S. Park, Y. Palaskas, and M. P. Flynn, “A 4GS/s 4bit Flash ADC in 0.18µm CMOS,” IEEE International Solid State Circuits Conference (ISSCC), San Francisco, CA, February 2006. |
| J. Chen, M. P. Flynn, and J. Hayes, ““A Fully Integrated Auto-Calibrated Super-Regenerative Receiver,” IEEE International Solid State Circuits Conference (ISSCC), San Francisco, CA, February 2006. |
| M. P. Flynn and J. Kang, “Global Signaling over Lossy Transmission Lines,” International Conference on Computer Aided Design (ICCAD)-Invited Tutorial Paper, San Jose, CA, November 2005. |
| J. Kang, J. Park, and M. P. Flynn, “Global High-Speed Signaling in Nanometer CMOS,” Asia Solid State Circuits Conference (ASSCC), Hsinchu, Taiwan, November 2005. |
| J. Chen, M. P. Flynn, and J. Hayes, “A 3.6mW 2.4-GHz Multi-Channel Super-Regenerative Receiver in 130nm CMOS,” Custom Integrated Circuits Conference (CICC), September 2005. |
| F. Kocer and M. P. Flynn, “A New Transponder Architecture for Long-Range Telemetry Applications,” European Conference on Circuit Theory and Design (ECCTD), Cork, Ireland, August 2005. |
| S. Park and M. P. Flynn, “Design Techniques for High Performance CMOS Flash Analog-to-Digital Converters,” European Conference on Circuit Theory and Design (ECCTD), Cork, Ireland, August 2005. |
| F. Kocer and M. P. Flynn, “A Long-Range RFID IC with On-chip ADC in 0.25µm CMOS,” IEEE Radio Frequency Integrated Circuits Conference (RFIC 2005), Long Beach, CA, June 2005. |
| J. Park and M. P. Flynn, “Capacitively Averaged Multi-Phase LC,” International Conference on Circuits and Systems (ISCAS), Kobe, Japan, 2005. |
| F. Kocer, P. M. Walsh, and M. P. Flynn, “Wireless Remotely Power Telemetry in 0.25µm CMOS,” 2004 VLSI Symposium, pp. 24-27, June 2004. |
| F. Kocer, P. M. Walsh, and M. P. Flynn, “An Injection Locked, RF Powered, Telemetry IC in 0.25µm CMOS,” IEEE Radio Frequency Integrated Circuits Conference (RFIC 2004), pp. 339-342, June 2004. |
| M. P. Flynn and I. Bogue, “Using redundancy to break the link between accuracy and speed in an ADC,” Instrumentation and Measurement Technology Conference (IMTC '03), Proceedings of the 20th IEEE, Vol: 1, pp. 850-853, May 10-22, 2003. |
| R. B. Brown, D. Sylvester, D. Blaauw, M. P. Flynn, and G. Carichner, “VLSI Design Curriculum,” 2004 ASEE Annual Conference & Exposition, Salt Lake city, UT, June 20-23, 2004. |
| F. Kocer, P. M. Walsh, and M. P. Flynn, “An RF Powered, Wireless Temperature Sensor in Quarter Micron CMOS,” IEEE International Symposium on Circuits and Systems (ISCAS 2004), May 23-26, 2004. |
| E. T. Zellers, K. D. Wise, K. Najafi, D. Aslam, R. B. Brown, Q. Y. Cai, J. Driscoll, M. P. Flynn, J. Giachino, R. Gordenker, M. D. Hsieh, C. T.-C. Nguyen, P. Bergstrom, J. Drelich, C. Friedrich, E. Gamble, M. Kaviany, C. J. lu, A. Matzger, M. Oborny, S. Pang, J. Potkay, R. Sacks, W. -C. Tian, W. Steinecker, J. Whiting, and Q. Zhong, “Determinations of Complex Vapor Mixtures in Ambient Air with a Wireless MicroanalyticalSystem: Vision, Progress, and Homeland Security Applications,” Technical Digest of the IEEE Conference on Technologies for Homeland Security, Boston, MA, pp. 92-95, November 13-14, 2002. |
| C. Donovan and M. P. Flynn, “A "digital" 6 bit ADC in 0.25µm CMOS,” Custom Integrated Circuits Conference, San Diego, CA, pp. 145-148, May 2001. |
| D. J. Foley and M. P. Flynn, “A low-power 8-PAM serial transceiver in 0.5µm CMOS,” Custom Integrated Circuits Conference (IEEE Conf. on), San Diego, CA, pp. 123-126, May 2001. |
| D. J. Foley and M. P. Flynn, “CMOS DLL based 2V, 3.2ps jitter, 1 GHz clock synthesizer and temperature compensated tunable oscillator,” Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (CICC '00), pp. 371-374, May 21-24. |
| D. J. Foley and M. P. Flynn, “A 3.3V, 1.6GHz, low-jitter, self-correcting DLL based clock synthesizer in 0.5um CMOS,” ISCAS, Geneva, Vol. 2, pp. 249-252, May 2000. |
| M. P. Flynn, M. Twohig, R. Byrne, H. Reyhani, and J. G. Ryan, “A BiCMOS preamplifier/write-driver IC for tape drive,” Proceedings of the IEEE Custom Integrated Circuits Conference (CICC '99), pp. 329-332, May 16-19. |
| M. P. Flynn and B. Sheahan, “A 400MSample/s 6b CMOS Folding and interpolating ADC,” International Solid-State Circuits Conference, February 1998. |
| M. P. Flynn and D. J. Allstot, “CMOS folding ADCs with current-mode interpolation,” IEEE International Solid-State Circuits Conference (ISSCC '95), Digest of Technical Papers, pp. 274-275, 378, Feb. 15-17. |
| M. P. Flynn, M. Buckley, and J. G. Ryan, “A CMOS magnetic-field-controlled duty-cycle oscillator sensor,” Proceedings of the IEEE Custom Integrated Circuits Conference (CICC '92), pp. 23.4.1-23.4.4, May 3-6. |
| P. C. Maulik, M. P. Flynn, D. J. Allstot, and L. R. Carley, “Rapid Redesign of Analog Cells using Constrained Optimization Techniques,” Custom Integrated Circuits Conference, May 1992. |
| J. G. Ryan, J. Doyle, M. Buckley, and M. P. Flynn, “A Magnetic Field Sensitive Amplifier with Temperature Compensation,” International Solid-State Circuits Conference, February 1992. |
| M. P. Flynn and S. Lidholm, “A High-Performance 1um CMOS Current Controlled Oscillator,” European Solid-State Circuits Conference, September 1991. |
| M. Buckley, J. Doyle, M. P. Flynn, and J. G. Ryan, “An investigation of split-drain MAGFET and signal conditioning circuitry,” Proceedings of Sensors and their Applications V, 1991. |
Invited Talks
| | M. P. Flynn, “CMOS super-regenerative radio and on-chip serial signaling ,” Georgia Electronic Design Center (GEDC) Seminar, Georgia Tech (Invited), February 3, 2006. |
| M. P. Flynn, “Research in Wireless Devices at Michigan’s Wireless Integrated Microsystems Center,” IEEE Solid-State Circuits Society (Invited), Tyndall National Laboratory, Cork, Ireland, August 18, 2005. |
| M. P. Flynn, “Wireless Sensing Systems,” NSF Workshop on Integrative Systems, March 7, 2005. |
| M. P. Flynn, “Research in Wireless Devices at Michigan’s Wireless Integrated Microsystems Center,” ECE Department Seminar (Invited), Carnegie Mellon University, Pittsburgh, PA, March 3, 2005. |
| M. P. Flynn, “WIMS Wireless Devices and Research,” Harvard University EE Seminar Series, October 22, 2004. |
| M. P. Flynn, “The Michigan Wireless Integrated Microsystems (WIMS) Environmental Sensor Platform,” Analytical Forum (Invited Plenary Speaker), Warsaw, Poland, July 7, 2004. |
| M. P. Flynn, “Mixed-Signal Baseband Circuits for Multimode Receivers,” University of California, Berkeley, EECS298-8: Integrated Circuits Seminar Fall 2003, October 6, 2003. |
| M. P. Flynn, “Mixed-Signal Basebands (A/D and Filtering),” Radio Frequency Integrated Circuits Symposium (RFIC '03), Philadelphia, PA, June 8, 2003. |
| M. P. Flynn, “The Michigan Wireless Integrated Microsystems Center (Invited Paper),” IEEE 2003 Sarnoff Symposium, Princeton, NJ, March 12, 2003. |
| M. P. Flynn, “EDA and Design Trends for Analog & Mixed Signal,” (Invited) Synopsys Technology meeting, October 17, 2002. |
| M. P. Flynn, “Digital Calibration of Flash Analog-to-Digital Converters,” CSSI Seminar, ECE, Carnegie Mellon University, February 26, 2002. |
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