This project is a joint venture of the
University
of Michigan, the University of
Colorado,
funded through Dr. Robert Graybill's PAC/C program at
DARPA.
The goal is to create an early power estimator that will allow
power/performance
trade-offs to be examined. It is based on the SimpleScalar
processor
simulator and is called Sim-Panalyzer.
The original name for this simulator, Power Analyzer, has been changed to
Sim-Panalyzer due to possible trademark issues.
People Involved:
Things We've Done :
MiBench
Benchmark Suite
MARS: Verilog
Implementation of an
ARM Core - 92 KB
- Currently password
protected - Read This
Sim-iPAQ:
SimpleScalar-based Platform Simulator for the iPAQ Computing Environment
- 35 MB
- Click Here
for its README file
Sim-Panalyzer Source Code:
Please send any questions/comments/discussions on Sim-Panalyzer to panalyzer-list@eecs.umich.edu.Helpful Links:
Arm
Processor Documentation (1.3 MB pdf file)