a Merged and Front Side Release Process for Thick Single Crystal Si Resonators and Conventional BiCMOS Circuitry


S. W. Pang and J. W. Weigold
University of Michigan, Ann Arbor, Michigan 48109-2122, USA


High quality resonant devices have been fabricated out of bulk single crystal Si but practical integration with circuitry usually requires a separate CMOS chip to do the signal processing. In addition, lower quality resonant devices have been fabricated out of polycrystalline Si and integrated with conventional circuit processes. However, it has been difficult to fabricate high quality thick single crystal Si mechanical devices integrated with a conventional circuit process in a simple and economical process. The advantage of higher quality mechanical components as well as thicker devices has been described previously. By combining circuitry on the same chip, smaller signals can be used for driving and sensing. When the electronics used to drive and sense motion in a mechanical structure are not on the same chip as the structure, signals must pass over bond wires and other packaging which have high parasitics. These parasitics can hurt the drive signal, but more importantly can severely limit the detectable output signal from the mechanics. However, if the output signal from the mechanics can be amplified on the same chip as the mechanics, before seeing all the packaging parasitics, then extremely small signals can be detected, amplified and buffered so that the parasitics have less of an effect. Not only can parasitics affect the electrical properties of the signals, but they can also affect the measured mechanical properties of the resonant devices. Parasitic resistances and capacitances can even affect the quality factor measured for the resonator.

In order to overcome some of these difficulties and realize the benefits of being able to condition signals on the same chip as the mechanical components, a process has been developed which integrates thick single crystal Si mechanical devices with a conventional circuit process, with the addition of only a single masking step. The process is described in the experiment section and has been used to fabricate mechanical devices on the same chip as electronics. A photo of a die containing an 11 um thick clamped-clamped beam single crystal Si resonator and a transimpedance amplifier is shown in Fig. 1. Both the mechanical and electrical functions have been tested and functionality has been verified. All fabrication was done at the University of Michigan using a conventional 3 um, 2-poly, 1 metal BiCMOS process. The transimpedance amplifier had a 3-dB frequency of 150 kHz which is well above the resonance frequency of the mechanical resonator. To minimize power consumption, the transistors were operated in the subthreshold regime, with a bias current less than 250 nA. For a 0 to 5 V rail-to-rail supply, the power dissipation was approximately 1.25 5W. Characteristics of the transistors were measured with similar results before and after mechanical processing. There are no high temperature steps following the circuit fabrication, so the mechanical processing should have no effect on the circuits.

Figure 2 shows a close-up of the clamped-clamped beam resonator shown on the die in Fig. 1. The beam is 500 um long, and 11 um thick with 3 um wide comb fingers and 3 um wide gaps. The metal lines can be seen which contact the heavily B doped structure. The separation between the substrate and the resonator can be arbitrarily varied by increasing or reducing the EDP release time. A large separation is probably desirable to reduce the effects of any charge that builds up on the substrate. Also, a large separation reduces parasitic capacitance between the resonator and the substrate as well as reduces Couette or Stokes type damping in air which commonly limits the quality factor of surface micromachined devices.

The resonator of Fig. 2 has been tested in air and its resonant characteristics are shown in Fig. 3. The resonator was tested with a dc bias of -50 V and an ac excitation signal of 20 Vp-p. The resonance frequency was determined to be 28.85 kHz with a maximum amplitude of vibration at resonance of 4.6 um. The resonator was over driven and therefore shows a sharp fall in vibration amplitude above the resonant frequency. The resonant characteristics have also been measured electrically so that lower driving voltages could be used and a symmetric resonance curve was observed. NMOS transistors were fabricated on the same chip as the resonator. Their IV curves were measured after all micromechanical processing and are shown in Fig. 4. There was no measurable change in the transistor parameters due to mechanical processing. The merged process used to fabricate the resonators with circuitry can easily be extended to take advantage of the submicrometer features presented in the submicrometer resonator page. This would allow increased sense signals coupled with on chip amplification and buffering, allowing an increase in design flexibility.


Figure 1. Photograph of the die containing the clamped-clamped beam resonator integrated with a transimpedance amplifier on the same chip.


Figure 2. Micrograph of the 11 um thick, 500 um long resonator with 3 um wide comb fingers and 3 um wide gaps shown in Fig. 1.


Figure 3. Resonant characteristics of resonator shown in Fig. 1 and 2. The resonant frequency was 28.9 kHz with a maximum amplitude of vibration of 4.6 um with a -50 V dc bias and a 20 Vp-p ac drive signal.


Figure 4. I-V curve for an NMOS transistor measured after all micromechanical processing. The threshold voltage was 0.6 V and the transistors had a VA of 40.8 V.


References

  1. J. W. Weigold, A.-C. Wong, C. T.-C. Nguyen, and S. W. Pang, "A Merged Process for Thick Single Crystal Si Resonators and Conventional BiCMOS Circuitry", IEEE J. of Microelectromech. Syst. 8, 221-228 (1999).
  2. J. W. Weigold, W. H. Juan, S. W. Pang, and J. T. Borenstein, "Characterization of Bending in Single Crystal Si Beams and Resonators", J. Vac. Sci. Technol. B 17, 1336-1340 (1999).
  3. J. W. Weigold, W. H. Juan, and S. W. Pang, "Dry Etching of Deep Si Trenches for Released Resonators in a Cl2 Plasma", J. Electrochem. Soc. 145, pp. 1767-1771 (1998).
  4. J. W. Weigold and S. W. Pang, "Fabrication of Thick Si Resonators with a Frontside-Release Etch-Diffusion Process", IEEE J. Microelectromech. 7, pp. 201-206 (1998).
  5. M. R. Rakhshandehroo, J. W. Weigold, W.-C. Tian, and S. W. Pang, "Dry Etching of Si Field Emitters and High Aspect Ratio Resonators Using an Inductively Coupled Plasma Source", J. Vac. Sci. Technol. B 16, pp. 2849-2854 (1998).
  6. J. W. Weigold and S. W. Pang, "High Aspect Ratio Single Crystal Si Microelectromechanical Systems", Proc. SPIE Conference on Micromachining and Microfabrication Process Technology 3551, pp. 242-251 (1998).
  7. J. W. Weigold, A.-C. Wong, C. T.-C. Nguyen, and S. W. Pang, "Thick Single Crystal Si Lateral Resonant Devices Integrated with a Conventional Circuit Process", in Late News Digest IEEE Solid-State Sensor and Actuator Workshop, Hilton Head Island, SC, June 1998.
  8. J. W. Weigold, W. H. Juan, and S. W. Pang, "Etching and Boron Diffusion of High Aspect Ratio Si Trenches for Released Resonators", J. Vac. Sci. Technol. B 15, pp. 267-272 (1997).
  9. J. W. Weigold and S. W. Pang, "A New Frontside-Release Etch-Diffusion Process for the Fabrication of Thick Si Microstructures", in Digest 9th Int. Conference on Solid-State Sensors and Actuators (Transducers'97), pp. 1435-1438, Chicago, June 1997.
  10. J. W. Weigold, W. H. Juan, S. W. Pang, and J. T. Borenstein, "Optical Interferometric Characterization of Membrane Curvature in Boron Doped Si Microstructures", Proc. SPIE Conference on Micromachining and Microfabrication Process Technology 3223, pp. 142-148 (1997).
  11. W. H. Juan, J. W. Weigold, and S. W. Pang, "Dry Etching and Boron Diffusion of Heavily Doped High Aspect Ratio Si Trenches", Proc. SPIE Conference on Micromachining and Microfabrication Process Technology 2879, pp. 45-55 (1996). 

Last Updated: November 19, 2007

E-Mail: pang@eecs.umich.edu 

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