Fast E100

This web page describes how to use a 75 MHz clock in your E100 processor. This will speed up your E100 by 50%.

1. Make a backup copy of your E100 directory.
2. Use these updated files in your E100:
   • top.v
   • clocks.v
   • pll.v
   • top.qsf
3. Here is an updated version of the partial control.v from the Lab 6 handout. The updated partial control.v has two changes to allow the E100 to run faster:
   • It adds a state (state_div9) to give the E100 div opcode more time to compute division.
   • It uses the Verilog case statement instead of if-then-else in the main state machine.
   Import the additions you made to control.v in Lab 6 into the updated partial control.v. You'll need to update the parameter values for your states to avoid conflicts with the new states in the updated partial control.v. When you add your states from Lab 6, add them to the main case statement by following the style in the updated partial control.v.