Publications

"Optimizing Non-Monotonic Interconnect using Functional Simulation and Logic Restructuring"
Stephen M. Plaza, Igor L. Markov, and Valeria Bertacco
pp. 95-102,ISPD, 2008.(Won Best Paper Award)
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"Random Stimulus Generation using Entropy and XOR Constraints"
Stephen M. Plaza, Igor L. Markov, and Valeria Bertacco
DATE, 2008.
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"Enhancing Design Robustness with Reliability-aware Resynthesis and Logic Simulation"
Smita Krishnaswamy, Stephen M. Plaza, Igor L. Markov, and John P. Hayes
ICCAD, 2007.
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Won 2nd Place in IWLS Programming Challenge
"AnSER: A Lightweight Reliability Evaluator for use in Logic Synthesis"
Smita Krishnaswamy, Stephen M. Plaza, Igor L. Markov, and John Hayes
IWLS, San Diego, 2007.
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"Toggle: A Coverage-guided Random Stimulus Generator"
Stephen M. Plaza, Igor L. Markov, and Valeria Bertacco
IWLS, San Diego, 2007.
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"Reliability-aware Synthesis using Logic Simulation"
Smita Krishnaswamy, Stephen M. Plaza, Igor L. Markov, and John Hayes
IWLS, San Diego, 2007.
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"Node Mergers in the Presence of Don't Cares"
Stephen M. Plaza, Kai-hui Chang, Igor L. Markov, and Valeria Bertacco
Asia-South Pacific Design Automation Conference (ASPDAC-07), Yokohama, 2007.
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"Architecting a Reliable CMP Switch Architecture"
Kypros Constantinides, Stephen Plaza, Jason Blome, Bin Zhang, Valeria Bertacco, Scott Mahlke, Todd Austin, and Michael Orshansky
To appear in ACM Transactions on Architecture and Code Optimization (TACO).
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"Advances and Insights into Parallel SAT Solving"
Stephen Plaza, Ian Kountanis, Zaher Andraus, Valeria Bertacco, and Trevor Mudge
International Workshop on Logic Synthesis, 2005. pp. 188-194.
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"BulletProof: A Defect Tolerant CMP Switch Architecture"
Kypros Constantinides, Stephen Plaza, Jason Blome, Bin Zhang, Valeria Bertacco, Scott Mahlke, Todd Austin, and Michael Orshansky
International Symposium on High-Performance Computer Architecture (HPCA), February 2006
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"Assessing SEU Vulnerability via Circuit-Level Timing Analysis"
Kypros Constantinides, Stephen Plaza, Jason Blome, Bin Zhang, Valeria Bertacco, Scott Mahlke, Todd Austin, and Michael Orshansky
Workshop on Architectural Reliability (WAR-1), November 2005
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"Boolean Operations on Decomposed Functions"
Stephen Plaza and Valeria Bertacco
International Workshop on Logic Synthesis, Lake Arrowhead, 2005
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"STACCATO: Disjoint Support Decompositions from BDDs through Symbolic Kernels"
Stephen Plaza and Valeria Bertacco
Asia-South Pacific Design Automation Conference (ASPDAC-05), Shanghai, 2005
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