Homework 1

EECS 470, Winter 1998

Reinhardt

Due January 16,1998

 

16-bit ALU Design

Using only NAND gates (or NOR gates, if you would prefer), design a 16-bit ALU that performs the following functions:

  1. out := a + b
  2. out := a AND b
  3. out := a
  4. out := b
  5. out := NOT (a)
  6. out := NOT (b)
  7. out := 0
  8. out := 1
You should recall the benefits of hierarchical design and first design a bit slice ALU and combine that into the full ALU.

Turn in appropriate documentation of your work including:

  1. A paragraph summarizing the function of each component of your design as well as how the components interact with each other.
  2. The worst case delay for your ALU in gate delays.
  3. A method for using your ALU, or perhaps multiple copies of it, to implement s := b-a and s := XNOR(a, b). Use drawings if you would prefer.
 
 

Also, you should save any drawing you turn in so that you may use them for later homework assignments.