MASE is microarchitecture simulation environment that provides
significant facilities for modeling modern microarchitecture,
including support for model validation, oracle studies,
aggressive speculation, and complex memory systems.  In addition,
MASE includes an overhauled version of sim-outorder, ported to
the MASE modeling infrastructure.  The new model includes many
enhancements including microfunctional operation (instruction
execute in the EX stage with live data), data speculation, ROB/RS
modeling, and an improved scheduler design with replay.  MASE was
written by Eric Larson, Dan Ernst, and Saugata Chatterjee at the
University of Michigan (plus extensive macro counseling was
provided by Todd Austin).

MASE will be included in SimpleScalar version 4.0 (due out early
next year), a test release is now available from the SimpleScalar
LLC website:

  http://www.simplescalar.com/v4test.html

A paper detailing the features implemented in MASE:

  Eric Larson, Saugata Chatterjee, and Todd Austin, MASE: A Novel
  Infrastructure for Detailed Microarchitectural Modeling, In the
  2001 International Symposium on Performance Analysis of Systems
  and Software, Nov. 2001   

is available online at this location:

  http://www.eecs.umich.edu/~larsone/mase.pdf

Included in the MASE release is a hacker's guide, INSTALL
directions, and source code.  The current test release works
with the PISA and Alpha SimpleScalar targets.

We welcome you feedback on MASE, please send comments/questions
and bug reports to help@simplescalar.com.

Best Regards,
-Todd Austin

-- MASE release history --

Release test1:

  - The memory address field is now removed from the ROB_entry.
    The memory address must either be obtained legally using
    the DTMP register or illegally using oracle data.  Some of
    this was done before the test release but the effort was
    not complete.  As a result, the data cache accesses were not
    happening due to an invalid address.  Invalid addresses
    are treated as having the same latency as a hit in the cache.

  - The checker_check function was very control intensive.  Most
    of the branches were used to check if an error needs to be
    printed out or if the instruction was timing dependent.  The
    functionality for these situations has been moved from this
    function to separate functions.  These functions are only
    called when the situation occurs.  This separation greatly
    improves MASE.  Now, on average, it runs only about 37% slower
    than sim-outorder (78% in the worst case).  This is much better
    than the 100% slowdown we reported in the ISPASS paper.  It
    appears, looking at the profile data, that the remaining 37%
    is due to overhead inherent in MASE.

  - sim-outorder regressions complete without problem


Release test0:

  - initial test release