BooksAndrew S. Tanenbaum and Todd Austin,
Structured Computer Organization, 6th Ed., Pearson, 2012.
Journal and Conference Publications
Salessawi Ferede Yitbarek, Misiker Tadesse Aga, Reetuparna Das, and Todd
Austin, "Cold Boot
Attacks are Still Hot," in the 2017 IEEE Symposium on High Performance
Computer Architecture (HPCA-2017), February 2017.
Kaiyuan Yang, Matthew Hicks, Qing Dong, Todd Austin, and Dennis
Sylvester, "A2: Analog
Malicious Hardware," in the 2016 IEEE Symposium on Security and Privacy
(Oakland 2016), May 2016. (Won the Distinguished Paper Award.)
Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Rui Qiao, Reetuparna
Das, Matthew Hicks, Yossi Oren, and Todd Austin, "ANVIL:
Software-Based Protection Against Next-Generation Rowhammer Attacks," in
the 2016 Annual International Symposium on Architecture Support for
Programming Languages and Operating Systems (ASPLOS-2016), April 2016.
Salessawi Ferede Yitbarek, Tao Yang, Reetuparna Das, and Todd Austin, "Exploring
specialized near-memory processing for data intensive operations," in
the 2016 Design, Automation & Test in Europe Conference & Exhibition
(DATE-2016), March 2016.
William Arthur, Ben Mehne, Reetuparna Das, and Todd Austin, "Getting
in Control of Your Control Flow with Control-Data Isolation," in the
2015 International Symposium on Code Generation and Optimization (CGO-2015),
February 2015.
Jason Clemons, Andrea Pellegrini, Silvio Savarese and Todd Austin, "EVA:
An Efficient Vision Architecture for Mobile Systems," in the 2013
International Conference on Compilers Architecture and Synthesis for
Embedded Systems (CASES-2013), October 2013.
William Arthur, Biruk Mammo,
Ricardo Rodriguez, Todd Austin, and Valeria Bertacco, "Schnauzer: Scalable
Profiling for Likely Security Bug Sites," in the 2013 International
Symposium on Code Generation and Optimization (CGO-2013), February 2013.
Jason Clemons, Yingze Bao, Mohit Bagra, Todd Austin, and Silvio Savarese,
"Scene Understanding for the Visually Impaired Using Visual Sonification by
Visual Feature Analysis and Auditory Signatures," Journal of Vision, Vol.
12, No. 9, August 2012 (journal abstract).
A. Pellegrini, R. Smolinski, L. Chen, X. Fu, S. Hari, J. Jiang, S. Adve,
T. Austin, and V. Bertacco, "CrashTest'ing SWAT: Accurate, Gate-Level
Evaluation of Symptom-Based Resiliency Solutions," in the 2012 Design,
Automation and Test in Europe Conference (DATE-2012), March 2012.
Joseph Greathouse, Hongyi Xin, Yixin Luo and Todd Austin, "A Case for
Unlimited Watchpoints," in the ACM International Conference on Architectural
Support for Programming Languages and Operating Systems (ASPLOS 2012), March
2012.
Jason Clemons, Sid Yingze Bao, Silvio Savarese, Todd Austin, and Vinay
Sharma, "MVSS: Michigan Visual Sonification System," in the 2012
International Conference on Emerging Signal Processing Applications
(ESPA-2012), January 2012.
Jason Clemons, Haishan Zhu, Silvio Savarese and Todd Austin, "MEVBench: A
Mobile Computer Vision Benchmarking Suite," in the 2011 IEEE International
Symposium on Workload Characterization (IISWC-2011), November 2011.
Jason Clemons, Andrew Jones, Robert Perricone, Silvio Savarese, and Todd
M. Austin, "EFFEX: an embedded processor for computer vision based feature
extraction," in the 2011 Design Automation Conference (DAC-2011), June 2011.
Joe Greathouse, Zhiqiang Ma, Matthew Frank, Ramesh Peri, and Todd Austin,
"Demand-Driven Software Race Detection using Hardware Performance Counters,"
in the 2011 International Symposius on Computer Architecture (ISCA-2011),
June 2011.
Joseph Greathouse, Chelsea LeBlanc, Valeria Bertacco and Todd Austin, "Highly Scalable Distributed Dataflow Analysis," in the 2011 International
Symposium on Code Generation and Optimization (CGO-2011), April 2011.
Andrea Pellegrini, Rob Smolinski, Lei Chen, Xin Fu, Siva Kumar Sastry
Hari, Junhao Jing, Sarita Adve, Todd Austin and Valeria Bertacco, "CrashTest'ing SWAT: Accurate, Gate-Level Evaluation of Symptom-Based
Resiliency Solutions," in the 2011 Workshop on Silicon Errors in Logic and
System Effects (SELSE-2011), March 2011.
Kypros Constantinides and Todd Austin, "Using Introspective
Software-Based Testing for Post-Silicon Debug and Repair," in the 2010
IEEE/ACM Design Automation Conference (DAC-2010), June 2010.
Andrea Pellegrini, Valeria Bertacco and Todd Austin, "Fault-Based
Attack of RSA Authentication," in the 2010 Design, Automation and Test
in Europe Conference (DATE-2010), March 2010. (slides)
Bo Zhai, Sanjay Pant, Leyla Nazhandali, Scott Hanson, Javin Olson, Anna
Reeves, Michael Minuth, Ryan Helfand, Todd Austin, Dennis Sylvester, and
David Blaauw, "Energy-Efficient
Subthreshold Processor Design," IEEE Transactions on VLSI Systems,
August 2009.
K. Constantinides, O. Mutlu, V. Bertacco, and T. Austin, "A
Flexible Software-Based Framework for Online Detection of Hardware Defects,"
IEEE Transactions on Computers, July 2009.
M. Mehrara and T. Austin, "Exploiting
Selective Placement for Low-cost Memory Protection," ACM Transactions on
Architecture and Code Optimization, Vol. 5, No. 3, November 2008.
Joseph L. Greathouse, Ilya Wagner, David A. Ramos, Gautam Bhatnagar, Todd
Austin, Valeria Bertacco and Seth Pettie, "Testudo: Heavyweight Security
Analysis via Statistical Sampling," in the 41st Annual International
Symposium on Microarchitecture (MICRO-41), November 2008.
Kypros Constantinides, Onur Mutlu, and Todd Austin, "Online Design Bug
Detection: RTL Analysis, Flexible Mechanisms, and Evaluation," in the
41st Annual International Symposium on Microarchitecture (MICRO-41),
November 2008.
Andrea Pellegrini, Kypros Constantinides, Dan Zhang, Shobana Sudhakar,
Valeria Bertacco, and Todd Austin, "CrashTest: A Fast High-Fidelity FPGA-Based
Resiliency Analysis Framework," IEEE 26th International Conference on
Computer Design (ICCD-2008), October 2008.
Kypros Constantinides, Valeria Bertacco, and Todd Austin, "Low-Cost
Protection for SER Upsets and Silicon Defects," TECHCON 2008, September
2008.
T. Austin, V. Bertacco, S. Mahlke, and K. Cao, "Reliable
Systems on Unreliable Fabrics," IEEE Design and Test, Vol. 25, No. 4,
July 2008.
Martha Mercaldi Kim, John D. Davis, Mark Oskin, and Todd Austin, "Polymorphic
On-Chip Networks," in the 35th Annual International Symposium on
Computer Architecture (ISCA-2008), June 2008.
S. Hanson, B. Zhai, M. Seok, B. Cline, K. Zhou, M. Singhal, M. Minuth, J.
Olson, L. Nazhandali, T. Austin, D. Sylvester, and D. Blaauw, "Exploring
Variability and Performance in a Sub-200-mV Processor," IEEE Journal of
Solid State Circuits (JSSC), Vol. 43, No. 4, April 2008.
Kypros Constantinides, Onur Mutlu, Todd Austin, and Valeria Bertacco, "Software-Based
On-Line Detection of Hardware Defects: Mechanisms, Architectural Support,
and Evaluation," in the 40th Annual International Symposium on
Microarchitecture (MICRO-40), December 2007.
Martha Mercaldi, Mojtaba Mehrara, Mark Oskin and Todd Austin, "Architectural
Implications of Brick and Mortar Silicon Manufacturing", in the 34th
Annual International Symposium on Computer Architecture (ISCA-2007), June
2007.
Scott Hanson, Bo Zhai, Mingoo Seok, Brian Cline, Kevin Zhou, Meghna
Singhal, Michael Minuth, Javin Olson, Leyla Nazhandali, Todd Austin, Dennis
Sylvester, David Blaauw, "Performance
and variability optimization strategies in a sub-200mV, 3.5pJ/inst, 11nW
subthreshold processor," IEEE Symposium on VLSI Circuits (VLSI-Symp), June
2007.
Ilya Wagner, Valeria Bertacco and Todd Austin, "Microprocessor
Verification via Feedback-Adjusted Markov Models", IEEE Transactions on
Computer-aided Design (TCAD), Vol. 26, No. 2, June 2007.
Kypros Constantinides, Stephen Plaza, Jason Blome, Bin Zhang, Valeria
Bertacco, Scott Mahlke, Todd Austin and Michael Orshansky, "Architecting
a Reliable CMP Switch", ACM Transactions on Architecture and Code
Optimization (TACO), Vol. 4, No. 1, March 2007.
Mojtaba Mehrara, Mona Attarian, Smitha Shyam, Kypros Constantinides,
Valeria Bertacco, and Todd Austin, "Low-cost Protection for SER Upsets and Silicon
Defects", in Design and Test in Europe (DATE-2007), March 2007.
Kypros Constantinides, Smitha Shyam, Sujay Phadke, Valeria Bertacco and
Todd Austin, "Ultra Low-Cost
Defect Protection for Microprocessor Pipelines", International
Conference on Architectural Support for Programming Languages and Operating
Systems (ASPLOS), San Jose, October 2006.
Ilya Wagner, Valeria Bertacco and Todd Austin, "Shielding
Against Design Flaws with Field Repairable Control Logic", IEEE/ACM
Design Automation Conference (DAC), San Francisco, July 2006.
Bo Zhai, Leyla Nazhandali, Javin Olson, Anna Reeves, Michael Minuth, Ryan
Helfand, Sanjay Pant, David Blaauw, Todd Austin, "A
2.60pJ/Inst Subthreshold Sensor Processor for Optimal Energy Efficiency,"
IEEE Symposium on VLSI Circuits (VLSI-Symp), June 2006.
Shidhartha Das, David Roberts, Seokwoo Lee, Sanjay Pant, David Blaauw,
Todd Austin, Krisztian Flautner, Trevor Mudge, "A
Self-Tuning DVS Processor using Delay-Error Detection and Correction,"
IEEE Journal of Solid-State Circuits (JSSC), April 2006.
Kypros Constantinides, Jason Blome, Stephan Plaza, Bin Zhang, Valeria
Bertacco, Scott Mahlke, Todd Austin, and Michael Orshansky, "BulletProof:
A Defect Tolerant CMP Switch Architecture," in the 12th International
Symposium on High-Performance Computer Architecture (HPCA-2006), February
2006.
Ilya Wagner, Valeria Bertacco, and Todd Austin, "Depth-Driven
Verification of Simultaneous Interfaces," in the 2006 Asian South
Pacific Design Automation Conference (ASPDAC-2006), January 2006.
Todd Austin and Valeria Bertacco, "Deployment
of Better Than Worst-Case Design: Solutions and Needs," in the 2005 IEEE
International Conference on Computer Design (ICCD-2005), October 2005.
Leyla Nazhandali, Michael Minuth, and Todd Austin, "Toward
an Accurate Evaluation of Sensor Network Processors," in the 2005 IEEE
International Symposium on Workload Characterization (IISWC-2005), October
2005.
Leyla Nazhandali, Michael Minuth, Bo Zhai, Javin Olson, Todd Austin and
David Blaauw, "A
Second-Generation Sensor Network Processor with Application-Driven Memory
Optimizations and Out-of-Order Execution," in the 2005 International
Conference on Compilers, Architecture, and Synthesis for Embedded Systems
(CASES-2005), September 2005.
Ilya Wagner, Valeria Bertacco, and Todd Austin, "StressTest:
An Automatic Approach to Test Generation via Activity Monitors," in the
42nd Design Automation Conference (DAC-2005), June 2005.
Leyla Nazhandali, Bo Zhai, Ryan Helfand, Michael Minuth, Javin Olson,
Sanjay Pant, Anna Reeves, Todd Austin, and David Blaauw, "Energy
Optimization of Subthreshold-Voltage Sensor Processors," in the 32nd
Annual International Symposium on Computer Architecture (ISCA-2005), June
2005.
S. Das, S. Pant, D. Roberts, S. Lee, D. Blaauw, T. Austin, T. Mudge, and
K. Flautner, "A Self-Tuning
DVS Processor Using Delay-Error Detection and Correction," in the 2005
Symposia on VLSI Technology and Circuits (VLSI-2005), June 2005.
Dan Ernst, Nam Sung Kim, Shidhartha Das, Seokwoo Lee, David Blaauw, Todd
Austin, Trevor Mudge, Krisztian Flautner, "Razor:
Circuit-Level Correction of Timing Errors for Low-Power Operation," IEEE
MICRO special issue on Top Picks From Microarchitecture Conferences of 2004,
March 2005.
David Roberts, Todd Austin, David Blaauw, Krisztian Flautner, and Trevor
Mudge, "Error Analysis for
the Support of Robust Voltage Scaling," in the 6th International
Symposium on Quality Electronic Design (ISQED-2005), March 2005.
Himanshu Kaul, Dennis Sylvester, David Blaauw, Trevor Mudge, and Todd
Austin, "DVS for On-Chip
Bus Designs Based on Timing Error Correction," in the 2005 Design,
Automation and Test in Europe Conference (DATE-2005), March 2005.
Todd Austin, Valeria Bertacco, David Blaauw, and Trevor Mudge, "Opportunities
and Challenges for Better Than Worst-Case Design," in the 2005 Asian
South Pacific Design Automation Conference (ASPDAC-2005), January 2005.
Brad Calder, Todd Austin, and Tim Cusac, "Binary
Instrumentation for Rapid Creation of Productivity Tools," in IQ: The
Information Quarterly, Vol. 3, No. 4, November 2004.
Rajeev Krishna, Scott Mahlke, and Todd Austin, "Memory
System Design Space Exploration for Low-Power, Real-Time Speech Recognition,"
in the 2004 Int'l. Conference on Hardware/Software Codesign and System
Synthesis, September 2004.
Seokwoo Lee, Shidhartha Das, Toan Pham, Todd Austin, David Blaauw, and
Trevor Mudge, "Reducing Pipeline Energy Demands with Local DVS and Dynamic Retiming," in the
2004 International Symposium on Low Power Electronics and Design
(ISLPED-2004), August 2004.
Nam Sung Kim, Tae Ho Kgil, Valeria Bertacco, Todd Austin, and Trevor
Mudge, "Microarchitectural
Power Modeling Techniques for Deep Sub-Micron Microprocessors," in the 2004
International Symposium on Low Power Electronics and Design (ISLPED-2004),
August 2004.
Seokwoo Lee, Shidhartha Das, Valeria Bertacco, Todd Austin, David Blaauw,
and Trevor Mudge, "Circuit-Aware Architectural
Simulation," in the 41st Design
Automation Conference (DAC-2004), June 2004.
Todd Austin, "Designing
Robust Microarchitectures," in the 41st Design Automation Conference
(DAC-2004), June 2004.
T. Austin, D. Blaauw, S. Mahlke, T. Mudge, C. Chakrabati, and W. Wolf, "Mobile
Supercomputers," IEEE Computer, Vol. 37, No. 5, May 2004.
Doug Burger, Todd Austin, and Stephen Keckler, "Recent
extensions to the SimpleScalar tool suite," ACM SIGMETRICS Performance
Evaluation Review, Vol. 31, No. 4, March 2004.
Todd Austin, David Blaauw, Trevor Mudge, and Krisztian Flautner, "Making
Typical Silicon Matter with Razor", IEEE Computer, March 2004.
Shubhendu S. Mukherjee, Christopher T. Weaver, Joel Emer, Steven K.
Reinhardt, and Todd Austin, "Measuring Architectural Vulnerability Factors", IEEE MICRO, December 2003.
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Toan Pham, Rajeev
Rao, Conrad Ziesler, David Blaauw, Todd Austin, Trevor Mudge, and Krisztian Flautner, "Razor: A Low-Power Pipeline Based on Circuit-Level Timing
Speculation," in the 36th Annual International Symposium on
Microarchitecture (MICRO-36), December 2003, received Best Paper Award.
Shubhendu S. Mukherjee, Christopher Weaver, Joel Emer, Steven K.
Reinhardt, and Todd Austin, "A Systematic Methodology to Compute the Architectural
Vulnerability Factors for a High-Performance Microprocessor," in the 36th
Annual International Symposium on Microarchitecture (MICRO-36), December
2003.
Nam
Sung Kim, Todd Austin, David Blaauw, Trevor Mudge, Krisztian Flautner, Jie
S. Hu, Mary Jane Irwin, Mahmut Kandemir, and Vijaykrishnan Narayanan, "Leakage
Current: Moore's Law Meets Static Power", IEEE Computer, December 2003.
Rajeev Krishna, Scott Mahlke, and Todd Austin, "Architectural Optimizations for
Low-Power, Real-Time Speech Recognition," in the 2003 International
Conference on Compilers, Architecture, and Synthesis for Embedded Systems
(CASES-2003), October 2003.
Eric Larson and Todd Austin, "High
Coverage Detection of Input-Related Security Faults," in the 12th
Annual USENIX Security Symposium (SEC-2003), August 2003.
Dan Ernst, Andrew Hamel, and Todd Austin, "Cyclone: A Broadcast-Free
Dynamic Instruction Scheduler with Selective Replay," ACM/IEEE 30th Annual
International Symposium on Computer Architecture (ISCA-2003), June 2003.
Dan Ernst and Todd Austin, "Efficient
Dynamic Scheduling Through Tag Elimination," ACM/IEEE 29th
International Symposium on Computer Architecture (ISCA-2002), May 2002.
Glenn Reinman, Brad Calder and Todd Austin, "High
Performance and Energy Efficient Serial Fetch Architecture," 4th
International Symposium on High Performance Computing (ISHPC-IV), May 2002.
Todd Austin, Eric Larson, and Dan Ernst, "SimpleScalar:
An Infrastructure for Computer System Modeling," IEEE Computer,
February 2002.
Shubhendu S. Mukherjee, Sarita V. Adve, Todd Austin, Joel Emer, and Peter
S. Magnusson, "Performance Simulation
Tools," IEEE Computer, February
2002.
Todd Austin, "Design for
Verification", IEEE Design and Test,
September 2001.
Chris Weaver, Kenneth C. Barr, Eric D. Marsman, Dan Ernst, and Todd
Austin, "Performance Analysis Using Pipeline
Visualization," 2001 IEEE
International Symposium on Performance Analysis of Systems and Software
(ISPASS-2001), June 2001. A longer version of this paper is also available.
Eric Larson, Saugata Chatterjee, and Todd Austin, "The
MASE Microarchitecture Simulation Environment", 2001 IEEE International
Symposium on Performance Analysis of Systems and Software (ISPASS-2001), June
2001.
Lisa Wu, Chris Weaver, and Todd Austin, "CryptoManiac:
A Fast Flexible Architecture for Secure Communication", ACM/IEEE 28th
International Symposium on Computer Architecture (ISCA-2001), June 2001.
Chris Weaver and Todd Austin, "A
Fault Tolerant Approach to Microprocessor Design" IEEE International
Conference on Dependable Systems and Networks (DSN-2001), June 2001.
Maher Mneimneh, Fadi Aloul, Saugata Chatterjee, Chris Weaver, Karem
Sakallah, and Todd Austin, "Scalable
Hybrid Verification of Complex Microprocessors", In the 38th Design
Automation Conference (DAC-2001), June 2001.
Glenn Reinman, Brad Calder, and Todd Austin, "Optimizations Enabled by a
Decoupled Front-End Architecture," IEEE Transactions on Computers, April
2001.
Saugata Chatterjee, Chris Weaver, and Todd Austin, "Efficient
Checker Processor Design", ACM/IEEE 33rd International Symposium on
Microarchitecture (MICRO-33), December 2000.
Eric Larson and Todd Austin, "Compiler
Controlled Value Prediction Using Branch Predictor Based Confidence",
ACM/IEEE 33rd International Symposium on Microarchitecture (MICRO-33),
December 2000.
Jerome Burke, John McDonald, and Todd Austin, "Architectural
Support for Fast Symmetric-Key Cryptography," ACM/IEEE Ninth
International Conference on Architectural Support for Programming Languages
and Operating Systems (ASPLOS-IX), October 2000.
Todd Austin, "DIVA: A Dynamic Approach to Microprocessor
Verification,"
Journal of Instruction Level Parallelism, May 2000.
Todd Austin, "DIVA: A
Reliable Substrate for Deep Submicron Microarchitecture Design,"
ACM/IEEE 32nd Annual Symposium on Microarchitecture (MICRO-32), November
1999, received Best Paper Award.
Glenn Reinman, Brad Calder and Todd Austin, "Fetch
Directed Instruction Prefetching," ACM/IEEE 32nd Annual Symposium on
Microarchitecture (MICRO-32), November 1999.
Gary Tyson and Todd Austin, "Memory Renaming: Fast, Early, and Accurate
Processing of Memory Communication," International Journal of Parallel
Programming, October 1999.
Glenn Reinman, Brad Calder, Dean Tullsen, Gary Tyson, and Todd Austin, "Classifying
Load and Store Instructions for Memory Renaming," ACM 13th International
Conference on Supercomputing (ICS'99), August 1999.
Pradip Bose, Tom Conte, and Todd Austin, "Challenges in Processor
Modeling and Validation: Current Practices and Future Needs," IEEE Micro,
June 1999.
Glenn Reinman, Todd Austin, and Brad Calder, "A Scalable Front-End
Architecture for Fast Instruction Delivery," ACM/IEEE 26th Annual
International Symposium on Computer Architecture (ISCA-26), May 1999.
Brad Calder, Simmi John, and Todd Austin, "Cache-Conscious Data
Placement," ACM SIGPLAN 8th International Conference on Architectural
Support for Programming Languages and Operating Systems (ASPLOS-VIII),
October 1998.
Artur Klauser, Dirk Grunwald, Brad Calder and Todd Austin, "Dynamic
Hammock Predication for Non-predicated Instruction Set Architectures," IEEE
International Conference on Parallel Architectures and Compilation Techniques
(PACT '98), October 1998.
Gary S. Tyson and Todd M. Austin, "Improving the Accuracy and
Performance of Memory Communication Through Renaming," ACM/IEEE 30th Annual
Symposium on Microarchitecture (MICRO-30), December 1997.
Jude A. Rivers, Gary S. Tyson, Todd M. Austin and Edward S. Davidson, "On
High-Bandwidth Data Cache Design for Multi-Issue Processors," ACM/IEEE 30th
Annual Symposium on Microarchitecture (MICRO-30), December 1997.
Douglas C. Burger and Todd M. Austin, "The
SimpleScalar Tool Set, Version 2.0," in Computer Architecture News, 25
(3), pp. 13-25, June, 1997.
Todd M. Austin and Gurindar S. Sohi, "High-Bandwidth Address Translation
for Multiple-Issue Processors," ACM/IEEE 23rd Annual International
Symposium on Computer Architecture (ISCA-23), May 1996.
Todd M. Austin and Gurindar S. Sohi, "Zero-Cycle Loads:
Microarchitecture Support for Reducing Load Latency", ACM/IEEE 28th Annual
International Symposium on Microarchitecture (MICRO-28), November 1995.
Todd M. Austin, Dionisios N. Pnevmatikatos, and Gurindar S. Sohi, "Streamlining
Data Cache Access with Fast Address Calculation," ACM/IEEE 22nd Annual
International Symposium on Computer Architecture (ISCA-22), June 1995.
Todd M. Austin, Scott E. Breach, and Gurindar S. Sohi, "Efficient
Detection of All Pointer and Array Access Errors," ACM SIGPLAN 1994
Conference on Programming Language Design and Implementation (PLDI'94),
June 1994.
Todd M. Austin and Gurindar S. Sohi, "Dynamic Dependency Analysis of
Ordinary Programs," ACM/IEEE 19th Annual International Symposium on
Computer Architecture (ISCA-19), May 1992.
Book Chapters
Nam Sung Kim, Todd Austin, Trevor Mudge, and Dirk Grunwald, "Challenges
for Architectural Level Power Modeling," in Power Aware Computing, eds.
R. Melhem and R. Graybill, Kluwer Academic Publications, 2002.
Invited Articles
Chris Weaver, Rajeev Krishna, Lisa Wu, and Todd Austin , "Application
Specific Architectures: A Recipe for Fast, Flexible and Power Efficient
Designs," in International Conference on Compilers, Architecture, and
Synthesis for Embedded Systems (CASES'01), November 2001.
Workshop Papers
Mojtaba Mehrara and Todd Austin , "Reliability-aware
data placement for partial memory protection in embedded processors," in
the Proceedings of the 2006 workshop on Memory system performance and
correctness (MSPC'06), October 2006.
Kypros Constantinides, Stephen Plaza, Jason Blome, Bin Zhang, Valeria
Bertacco, Scott Mahlke, Todd Austin, Michael Orshansky, "Assessing
SEU Vulnerability via Circuit-Level Timing Analysis," in the 1st
Workshop on Architectural Reliability (WAR-1), November 2005.
Jeff Ringenberg, David Oehmke, Todd Austin, and Trevor Mudge, "SimpleDSP:
A Fast and Flexible DSP Processor Model," in the 5th Workshop on Media
and Streaming Processors (MSP5) in the 36th Ann. IEEE/ACM Symp.
Microarchitecture (MICRO-36), Dec. 2003.
Dan Ernst and Todd Austin, "Practical
Selective Replay for Reduced-Tag Schedulers," in the 2nd Annual
Workshop on Duplicating, Deconstructing, and Debunking (WDDD-2003), held in
conjunction with the 30th International Symposium on Computer Architecture
(ISCA-30), June 2003.
Christopher Weaver, Eric Larson, and Todd Austin, "Effective
support of simulation in computer architecture instruction," in the
2002 Workshop on Computer Architecture Education (WCAE 2002), held in
conjunction with the 29th International Symposium on Computer Architecture
(ISCA-29), May 2002.
Nam Sung Kim, Todd Austin, and Trevor Mudge, "Low-Energy
Data Cache Using Sign Compression and Cache Line Bisection," ACM/IEEE
2nd Annual Workshop on Memory Performance Issues (WMPI 2002), May 2002.
Rajeev Krishna, Todd Austin and Scott Mahlke, "Insights
into the Memory Demands of Speech Recognition Algorithms," ACM/IEEE 2nd
Annual Workshop on Memory Performance Issues (WMPI 2002), May 2002.
Matthew Guthaus, Jeff Ringenberg, Dan Ernst, Todd Austin, Trevor Mudge,
and Richard Brown, "MiBench:
A Free, Commercially Representative Embedded Benchmark Suite," IEEE 4th
Annual Workshop on Workload Characterization (WWC-4), December 2001.
Rajeev Krishna and Todd Austin, "Efficient
Software Decoder Design", IEEE Computer Society Technical Committee on
Computer Architecture (TCCA) Newsletter, October 2001, also appears in the
2001 Workshop on Binary Translation, September 2001.
Technical Reports
Chris Weaver, Fadi Gebara, Todd Austin, and Richard Brown, "Remora:
A Dynamic Self-Tuning Processor," University of Michigan CSE Technical
Report CSE-TR-460-02, July 2002.
Eric Larson, Saugata Chatterjee and Todd Austin, "MASE:
A Novel Infrastructure for Detailed Microarchitectural Modeling,"
University of Michigan CSE Technical Report CSE-TR-442-01, July 2001.
Glenn Reinman, Brad Calder, and Todd Austin, "A Power Efficient
Speculative Fetch Architecture," UC San Diego Technical Report CS2000-0657,
May 2001.
Glenn Reinman, Brad Calder, and Todd Austin, "Building a Scalable Branch
Predictor and an Instruction Prefetch Engine by Decoupling Branch Prediction
from Instruction Fetch," UC-San Diego Technical Report CS00-645, February
2000.
Glenn Reinman, Brad Calder, Dean Tullsen, Gary Tyson, and Todd Austin, "Profile-Guided
Load Marking for Memory Renaming," University of California, San Diego,
Technical Report UCSD-CS98-593, July 1998.
Douglas C. Burger and Todd M. Austin, "The
SimpleScalar Tool Set, Version 2.0," UW Madison Computer Sciences
Technical Report #1342, June 1997.
Doug Burger, Todd M. Austin and Steve Bennett, "Evaluating
Future Microprocessors: The SimpleScalar Tool Set," UW Madison
Technical Report #1308, July 1996.
Todd M. Austin, "Hardware
and Software Mechanisms for Reducing Load Latency," Ph.D. Thesis, UW
Madison Technical Report # 1311, April 1996.
Todd M. Austin, Scott E. Breach, and Gurindar S. Sohi, "Efficient
Detection of All Pointer and Array Access Errors," UW Madison Technical
Report #1197, December 1993.
Todd M. Austin, T.N. Vijaykumar, and Gurindar S. Sohi, "Knapsack:
A Zero-Cycle Memory Hierarchy Component," UW Madison Technical Report
#1189, November 1993.
Todd M. Austin and Gurindar S. Sohi, "Tetra:
Evaluation of Serial Program Performance on Fine-Grain Parallel Processors,"
UW Madison Technical Report #1163, July 1993.
Todd M. Austin, "Exploiting Implicit Parallelism in SPARC Instruction
Execution," M.S. Thesis, Rochester Institute of Technology, Wallace Library
call number QA76.9.A73 A86 1990, August 1990.
United States Patents
Seokwoo Lee, and Todd Austin,
Recovery From Errors in a Data Processing Apparatus, U.S. Patent
#7,401,273, issued July 2008.
Dan Ernst and Todd Austin,
Technique for reduced-tag dynamic scheduling, U.S. Patent #7,398,375,
issued July 2008.
Trevor Mudge, Todd Austin, David Blaauw, and Krisztian Flautner,
Systematic and random error detection and recovery within processing stages
of an integrated circuit, U.S. Patent #7,337,356, issued February 2008.
Trevor Mudge, Todd Austin, David Blaauw, and Krisztian Flautner,
Data
retention latch provision within integrated circuits, U.S. Patent
#7,310,755, issued December 2007.
Krisztian Flautner, Todd Austin, David Blaauw, and Trevor Mudge,
Error
Detection and Recovery within Processing Stages of an Integrated Circuit,
U.S. Patent #7,278,080, issued October 2007.
Trevor Mudge, Todd Austin, David Blaauw, and Krisztian Flautner,
Systematic and random error detection and recovery within processing stages
of an integrated circuit, U.S. Patent #7,162,661, issued January 2007.
Todd Austin, David Blaauw, Trevor Mudge, Dennis Sylvester, and Krisztian
Flautner,
Memory system having fast and slow data reading mechanisms, U.S. Patent
#7,072,229, issued July 2006.
Trevor Mudge, Todd Austin, David Blaauw, Dennis Sylvester, and Krisztian
Flautner,
Memory system having fast and slow data reading mechanisms, U.S. Patent
#6,944,067, issued September 2005.
Todd Austin, Dionisios Pnevmatikatos, and Gurindar Sohi,
Data
Cache Fast Address Calculation System and Method, U.S. Patent Number
5,860,151, issued January 12, 1999.
Todd Austin,
Method for Detecting Computer Memory Access Errors, U.S. Patent Number
5,644,709, issued July 1, 1997.
Donald Wegeng, Jeff Carter, Thomas Beaman, Gregory Sosinski, and Todd
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Data Transfer Architecture and Method for an Electronic Reprographic Machine,
U.S. Patent Number 5,420,696, issued May 30, 1995.
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