EECS 573 Winter 2006

Instructor: Prof. Trevor Mudge, tnm@umich.edu 4757 CS

General

The format of this class will be a research seminar. Each student will be required to select a paper and its related topic from a list of recent papers from MICRO05, ISLPED05, DAC05, ASPLOS05 and ISCA05 and then give a 30 minute talk on the subject. These talks should include a Power Point presentation and a handout, and everyone will be expected to participate by asking questions and filling out an evaluation form.

You will be required to submit 2 reports of 2000 words each. One will be on the paper you present and the other will be on one other paper presented by another member of the class. These will be due 1 week after the respective presentations and should be emailed to me as a PDF document. No other input will be considered.

Meeting times

The class will meet from 10:30a to noon on Mondays and Wednesdays in room 3437 EECS.

♦ Schedule of talks. Please check this regularly as this may change as the semester progresses.

Date Monday Date Wednesday
9-Jan Introduction 11-Jan Reading a paper - VCA
16-Jan MLK 18-Jan EPFL trip
23-Jan ARM trip 25-Jan Talks 1 + 2
30-Jan Talks 3 + 4 1-Feb Talks 5 + 6
6-Feb Talks 7 + 8 8-Feb Talks 9 + 10 
13-Feb HPCA 15-Feb HPCA
20-Feb Talks 11 + 12 22-Feb Talks 13 + 14
27-Feb Break 1-Mar Break
6-Mar Talks 15 + 16 8-Mar Talks 17 + 18
13-Mar Talks 19 + 20 15-Mar Talks 21 + 22
20-Mar Talks 23 + 24 22-Mar Int. Ventures
27-Mar Talks 25 + 26 29-Mar Talks 27 + 28
3-Apr Talks 29 + 30 5-Apr Talks 31 + 32
10-Apr Talks 33 + 34 12-Apr Talks 35 + 36
17- Apr Talk 37    

♦  Talk assignments and additional report assignment. Please check this regularly as this may change as the semester progresses.

 

FIRST Talk Done Rept1 done Rept2 Done Title of paper and talk + Rept1
Robert 1 x x 8 x An Architecture Framework for Transparent Instruction Set Customization in Embedded Processor
Farhud 2 x x 9 x Direct Cache Access for High Bandwidth Network I/O
Jeffrey 3 x x 10 x Improving Program Efficiency by Packing Instructions into Registers
Geoffrey 4 x x 11 x Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors
George 5 x x 12 x Software Prefetching for Mark-Sweep Garbage
Evan 6 x x 13 x Direct Cache Access for High Bandwidth Network I/O
Manoj 7 x x 14 x The Impact of Performance Asymmetry in Emerging Multicore Architectures
Korey 8 x x 15 x “Flea-flicker”* Multipass Pipelining: An Alternative to the High-Power Out-of-Order Offense
Mahadev 9 x x 16 x Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking
Sanjay 10 x x 17 x Instruction Packing: Reducing Power and Delay of the Dynamic Scheduling Logic
Steven 11 x x 18 x Automatic Thread Extraction with Decoupled Software Pipelining
Ilya 12 x x 19 x Rescue: A Microarchitecture for Testability and Defect Tolerance
Ian 13 x x 20 x Piecewise Linear Branch Prediction
Mark 14 x x 21 x Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors
John 15 x x 22 x Improving Multiprocessor Performance 
Shantanu 16 x x 23 x A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance
Amir 17* x x 24   Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution
Erick 18 x x 25 x Conjoined-core Chip Multiprocessing
Andrew 19 x x 26 x Balancing Resource Utilization 
Jingyang 20 x x 27 x Continuous Optimization
Konstantin 21 x x 28 x Balancing Resource Utilization
Scott 22 x x 29 x An Ultra Low Power System Architecture for Sensor Network Applications 
Smitha 23 x x 30 x A Mechanism for Online Diagnosis of Hard Faults in Microprocessors
Deepesh 24 x   31   A Simple Mechanism to Adapt Leakage-Control Policies to Temperature 
Shuguang 25 x x 32 x Opportunistic Transient-Fault Detection
Heng-Li 26 x x 33   Mitigating Amdahl's Law Through EPI Throttling
Giselle 27 x x 34 x Architecture for Protecting Critical Secrets in Microprocessors
Mona 28* x x 35 x Address-Value Delta (AVD) Prediction: Increasing the Effectiveness of Runahead Execution by Exploiting Regular Memory Allocation Patterns
David 29 x x 1 x RENO: A Rename-Based Instruction Optimizer
Kelsey 30 x x 2 x A Robust Main-Memory Compression Scheme
Vashist 31 x x 3 x RegionScout: Exploiting Coarse Grain Sharing In Snoop-Based Coherence
Yueh-Chuan 32 x x 4 x The V-way Cache: Demand-Based Associativity via Global Replacement
Gabriel 33 x x 5 x Efficient Use of Invisible Registers in Thumb Code
Adam 34 x x 6 x Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking
Brian 35 x   7 x RegionScout: Exploiting Coarse Grain Sharing in Snoop-Based Coherence
Tejasvi 36 x   8 x Variations-Aware Low-Power Design with Voltage Scaling
Meghna 37     9 x Energy Optimization of Subthreshold-Voltage Sensor Network Processors
             
  * swapped        

 

 

Grading


Class participation will account for 30% of the final grade. Participation includes asking thoughtful questions and completing the evaluation form. The presentation itself will account for 30% of the total grade.

The two reports will each account for 20% of your grade.


Talks and reports

One week prior to your talk you should post on the news group a PDF of your chosen paper and a power-point of your slides. The news group is:  phorum .

The talk should break down into the following parts:

  1. State the title of the paper, who you are, and a two line bio.
  2. Give the background of the paper, i.e., the general area of research.
  3. Within that general area, state the specific problem that the paper addresses.
  4. Explain what the central idea of the paper is and how it solves the problem in 3. This part is key to the overall presentation and it should be emphasized and illustrated with examples, where possible.
  5. A critique of the idea should be presented: is it good? or not? Is there a flaw in the idea? If so what is it.
  6. Previous work on the subject should be explained. This will require a paper search, an element of any good research project.
  7. At least one slide should show the genesis of the idea -- the papers from which the idea was synthesized.
  8. What new ideas does the idea in the paper suggest.

Each student will be expected to fill out a short evaluation from for each presentation (see link above).

Your report should be about 2000 words exclusive of references and figures. It should NOT be a simple summary of the paper. Of course, it makes sense to provide a brief summary explaining the key ideas, but I am looking for a critique that identifies the strengths and weaknesses.  It should also have a background section that identifies the prior work/papers.

Online Resources

Make use of the library's electronic collection. The most useful will probably be IEEExplorer and ACM Digital Library .