Verilog of ARM Core
(with Code Compression)
courtesy of Charles Lefurgy

There are 2 files and a README for using them located at:
ftp://ftp.eecs.umich.edu/people/lefurgy
 

The isc.tgz (134 MB) file contains:
-  The verilog for the ARM chip (with compression extensions)
-  The GNU development environment for ARM (as, gcc, gdb).
     -  It is a cross-compiling environment for use under x86-linux.
-  The armulator (ARM behavioral emulator) which is included in gdb.
     -  The armulator is modified so that it has hooks for running programs and comparing results with the verilog simulation of the ARM
-  READMEs in various directories to explain how to use everything.

Note:  You can use this to compile some ARM programs and run them under verilog simulation.
 

The ss-compress.tgz (7 MB) file:
-  The simulator for compression studies on simplescalar PISA.
     -  ARM is not used for the performance simulation studies on compression.
-  There are 2 simulators:
     1)  Hardware decompression
     2)  Software-managed decompression
-  There are 2 compression algorithms used:
     1)  Simple dictionary compression
     2)  A codepack-like algorithm.  For details, see Charles' dissertation (on his web page).
         http://www.eecs.umich.edu/~lefurgy
-  There are some READMEs, but they provide only minimal help.  But it should be enough to compile and run a compressed program.