Group Assignment 1 -- EECS 270, Spring '23

Due Wednesday. May 10th @9pm, 5% off if turned in before 11pm. No credit after that..


It is expected that each group member contributed to the assignment; non-contributing members should not have their name on this document. This assignment is worth about 1% of your grade in the class and is graded out of 30 points. Remember you may drop one group assignment.
Consider a set of gates which generate one output from four inputs. The inputs are named A3, A2, A1, and A0 and the output is named primep. The inputs are treated as a 4-digit unsigned binary number with A3 being the most significant bit. So A3=1, A2=1, A1=1, A0=0 is treated as 1110 base 2 (11102) which is 14 in base 10 (1410). primep should be a one iff (if and only if) the input is a "prime-plus" number. That is one of 1, 2, 3, 5, 7, 11, or 13.

(Note on syntax: Writing A3=1, A2=1, A1=0, A0=1 is a bit cumbersome. Traditionaly we'd write A[3:0]=1101.)

Examples:

Your task is to design a logic circuit using only two-input AND, OR, NAND, NOR and XOR gates as well as one-input NOT gates. Further, you are not allowed to have any gate or input have a fan-out greater than 4. (This means that no gate or input is allowed to act as the input for more than 4 gates.) Your job is to minimize the worst case delay through the circuit using the assumptions on delay found below.

You are to assume that NOT gates have a delay of 2, NAND and NOR have a delay of 3, AND and OR have a delay of 5, and XOR has a delay of 6.

Grading for this problem will be based upon correctness and (assuming it is correct) worst case delay. You can also lose points for sloppy or otherwise flawed solutions (like calculating or highlighting the worst case-delay incorrectly). Scoring:

For the record, the instructor has a solution that hits 18. I'm really not sure what the best you can do is. It may be that 28 points is the most anyone will earn on this but I think there is a 14 solution and maybe one better...

Further the best team will get a 6 point bonus (if there is a tie they split the 6 points amoung the tieing teams.)

Your group is to turn in:

You will get -3 points for not finding the worst-case path and -3 points for not correctly computing the worst-case delay for that path. Your maximum score for a circuit that computes the wrong truth table is 15 (if you leave out a bubble or make some other simple error). Please carefully check your work.