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Course Info

LecturesMon & Wed 1:30-2:50 PM, Zoom Link
DiscussionFri 1:30-2:20 PM (when needed)
Web Pagehttp://www.eecs.umich.edu/courses/eecs570/
Canvashttp://canvas.umich.edu/
Piazzahttp://piazza.com/umich/winter2020/570/home/
InstructorSatish Narayanasamy
Email, URLnsatish /at/ umich.edu, http://www.eecs.umich.edu/~nsatish/
Office4721 BBB
Phone734-764-6984
Office HoursMon 3:00-4:00 PM Zoom Link
GSIJonah Rosenblum
Emailjonaher /at/ umich.edu
Office HoursTue 12:00-1:00 PM, Thu 11:45 AM-12:45 PM, Fri 1:30-2:30 PM (instead of discussion)
OH/Discussion LocationZoom Link (Passcode: 0ab7Xa)

Description

EECS 570 will discuss foundations of a multi-processor architecture, both design and programming of such machines. We will read and discuss recent advancements in parallel architectures, and learn about recent parallel processors. We will also learn a bit about parallel applications and a dvancements in parallel programming such as CUDA, transactional memory, etc., which could influence the design of future parallel processors. There will be two programming assignment, two exams, a final research project and quiz questions on the readings.

What knowledge does EECS 570 assume?

EECS 570 assumes that you can read and analyze recent papers published in top-tier computer architecture and systems conferences (ISCA, MICRO, ASPLOS, SOSP, OSDI). EECS 470 should provide adequate preparation.

Acknowledgements

EECS 570 has been supported by generous equipment donations from Intel's University Program Office.

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