intro
high level design
hardware
software
results
conclusions
media
work distribution
appendix
 

While our control software was not overly complex, the tasks of setting up the MPC555 for operation and calibrating the control algorithm proved to be quite challenging.

MPC555 peripheral configuration was not terribly difficult, due in part to documentation from EECS 461, which uses the same processor. We were able to develop generic configuration functions for the Queued Analog to Digit module(QADC) and the modular I/O subsystem(MIOS) with minimal difficulty. While the MPC555 uses the same basic interrupt structure as the MPC823, many of its interrupt sources come from the inter-module bus (IMB3), which multiplexes a number of interrupts to the same level. As we were only using a small number of interrupts, this feature was disabled in order to simplify our software.

The real challenge with the MPC555 configuration was in enabling flash memory (where the interrupt table must be located) by default. As flash memory is disabled by default when the flash is erased, we had to manually program the Hard Reset Configuration Command Word to enable flash, allowing the interrupt table to be accessed on reset, and our code to being executing. To expedite development (and avoid having to reflash the code every time we made a change), we had our reset interrupt branch to a specific location in RAM, where we placed our program with the debugger cable.

Our original algorithm simply had us polling our sensors every ~1ms, and updating the control logic. The first thing we discovered was that there was a fair amount of noise on the sensor signals, causing the wheels to turn even without the beacon changing position. To deal with this, we added both an averaging function (taking three consecutive samples from each sensor and averaging them), and hysterysis to the control loop-- requiring that a sensor signal be high for a given number of consecutive cycles before the wheel direction changed.

Originally, we based on interrupt loop on the QADC module's conversion complete interrupt/timer features. Upon recieving the "start conversion" signal, the QADC would start a timer, counting for 2^7 QADC clock periods (derived from f_sys and a prescaler), and then start the conversion at the completion of the countdown. When the QADC finished all conversions in its queue, it would send an interrupt to the core, which performed our control logic. While this provided a simple and configurable control loop, we ultimately had to move to the programmable interrupt timer (PIT), so that we could turn off the motor prior to performing the AtoD conversion, in order to avoid the interrferece the motor generated.

Our motor and steering control PWMs were generated using the MIOS PWM submodule, each with its own prescaler, allowing us to specify both the signal period and high time in counts of the submodule's clock. The calibration of the motor control PWM proved to be quite difficult, for two reasons. First, it was difficult to gauge how fast the car would move on the ground for a given wheel speed when the car was on blocks. Second, as the batteries drained, a given PWM generated less and less speed, causing us to have to recalibrate as we experiemtned with the car.