Course Info
| Lectures | Mon & Wed 3:00-4:20 PM, 1670 BEYSTER |
|---|---|
| Discussion | Fri 3:30-4:20 PM, 165 CHRYS |
| Web Page | http://www.eecs.umich.edu/courses/eecs570/ |
| Canvas | http://canvas.umich.edu/ |
| Piazza | http://piazza.com/umich/winter2026/eecs570/home/ |
| Instructor | Satish Narayanasamy |
| Email, URL | nsatish /at/ umich.edu |
| Office | 4741 BBB |
| Office Hours | Tue 11:00 AM - 12:00 PM in Office and on Zoom |
| GSI | Tom Twomey |
| ttwomey /at/ umich.edu | |
| Office Hours | Tue & Thu: 2:00-3:30 PM in BBB Atrium and on Zoom |
EECS 570 will discuss foundations of multiprocessor architecture, including both the design and programming of such machines. We will read and discuss recent advancements in parallel architectures and processors. The course places particular emphasis on GPUs, ML accelerators, hardware multithreading, and network-on-chip (NoC) design, and covers memory hierarchies, cache coherence, and memory consistency models. In parallel programming, we will cover conventional shared-memory multithreading and synchronization mechanisms, as well as CUDA and other accelerator-oriented models that influence the design of future processors. There will be two programming assignments, two exams, a final research project, and quiz questions on the readings.