Note: Schedule changes frequently - this is only a rough plan.
| Date(s) |
Topic |
Readings |
Slides |
|
Programming/Project |
| Aug 31 |
L1 Introduction to Parallel Computer Architecture |
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| Sep 2 |
L2 Message Passing & Shared Memory Models |
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| Sep 7 |
Labor Day - No Class |
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| Sep 9 |
L3 Shared Memory and Synchronization Primitives |
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| Sep 11 |
PA1 Introduction |
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| Sep 14 |
L4 Synchronization: Locks and Barriers |
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| Sep 16 |
L5 Transactional Memory |
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| Sep 18 |
Project Introduction |
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| Sep 21 |
L6 Snooping Cache Coherence Protocols |
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| Sep 23 |
L7 Bus-Based SMP Architectures |
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| Sep 28 |
L8 Directory-Based Coherence Protocols |
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| Sep 29 |
PA1 Due |
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| Sep 30 |
L9 Memory Consistency Models I |
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| Oct 2 |
PA2 Introduction |
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| Oct 5 |
L10 Sequential Consistency: End-to-End Analysis |
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| Oct 7 |
L11 Weaker Memory Consistency Models |
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| Oct 9 |
Project Proposal Due |
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| Oct 12 |
L12 Midterm Review & Discussion |
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| Oct 14 |
Midterm Exam (1:30-3:00 PM or evening; time and location TBA) |
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| Oct 19-20 |
Fall Study Break - No Class |
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| Oct 21 |
L13 Data-Level Parallelism |
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| Oct 26 |
L14 GPU Architecture Fundamentals |
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| Oct 28 |
L15 GPU Optimization Techniques |
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| Oct 30 |
Project Milestone Due |
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| Nov 2 |
L16 GPU Optimizations II |
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| Nov 4 |
L17 Hardware Multi-threading |
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| Nov 6 |
PA2 Milestone Due |
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| Nov 9 |
L18 Domain-Specific Accelerators: Genomics |
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| Nov 11 |
L19 ML Accelerators Overview |
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| Nov 16 |
L20 Processing-in-Memory for ML |
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| Nov 18 |
L21 Interconnect Networks: Introduction |
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| Nov 20 |
PA2 Due |
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| Nov 23 |
L22 Interconnects: Routing Algorithms |
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| Nov 25-27 |
Thanksgiving Break - No Class |
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| Nov 30 |
L23 Interconnects: Flow Control |
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| Dec 2 |
L24 Interconnects: Router Microarchitecture |
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Last Lecture |
| Dec 9 |
Project Poster Presentations (1:30-4:00 PM; location TBA) |
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| Dec 11 |
University Last Day of Classes (no scheduled meeting) |
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| Dec 15 |
Final Exam (4:00-6:00 PM; location TBA) |
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