Low Power Inter-Chip Wireless Communication Using Inductive Coupling and UWB

Sang Wook Han, Dae Young Lee, Geonwook Yoo

Abstract

The purpose of this project is to implement low power inter-chip wireless communication inside a package by exploiting inductive coupling and ultra wide band communication. This system will consist of three parts: a transmitter, a receiver and coupled inductors. A transmitter will be implemented with an H-bridge circuit and pulse generator. It will transmit voltage pulse signal to a spiral inductor in a transmitter chip. Then a coupled inductor in the receiver chip will generate eddy current, and a receiver circuit will detect this signal and recover data.

In this project, we will try many different schemes to save the power dissipation, and make tradeoffs among power consumption, channel area size, and communication speed. Finally, we will introduce the performance comparison with other ISSCC transceivers.

References

  1. M. Sasaki and A. Iwata, "A 0.95mW/1.0Gbps Spiral-Inductor Based Wireless Chip-Interconnect with Asynchronous Communication scheme", Symposium on VLSI Circuits Digest of Technical Papers, pp348-351, 2005
  2. D. Mizoguchi et al. "A 1.2Gb/s/pin Wireless Superconnect Base on Inductive Inter-Chip Signaling (IIS)", ISSCC Digest of Technical Papers, pp142-143, 2004
  3. P. K. Saha et al. "A CMOS UWB Transmitter for Intra/Inter-chip Wireless Communication", ISSST, Sep. 2004
  4. N. Miura et al, "A 1Tb/s 3W Inductive-Coupling Transceiver for Inter-Chip Clock and Data Link", IEEE Journal of Solid-State Circuits, Jan. 2007

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