BigM - University of Michigan

EECS 578 - Correct Operation for Processors
and Embedded Systems

Prof. Valeria Bertacco
FALL 2015

EECS578 logo

Paper presentation assignments

No.DatePaper titlePresenter 1Presenter 2
124-Sep A systematic methodology to develop resilient cache coherence protocolsHelen HagosMilind Furia
229-SepHardware trojan detection for gate-level ICs using signal correlation based clusteringJavad BagherzadehAmeya Rune
31-OctExploring fault-tolerant network-on-chip architecturesYang JiaoTan Bie
46-OctAccelerating microprocessor silicon validation by exposing ISA diversityZixin WangRong Xu
58-OctArgus: low-cost, comprehensive error detection in simple coresYunkai Zhao-
613-OctArchitectural core salvaging in a multi-core processor for hard-error toleranceMeghan CowanYilei Xu
715-OctGRASP: a search algorithm for propositional satisfiabilityJing JiQilu Guo
822-OctTrends in functional verification: a 2014 industry studySugandha GuptaByoungchan Oh
93-NovArMOR: defending against consistency model mismatches in heterogeneous architecturesZeyu BuYao Jiang
105-NovPVCoherence: designing flat coherence protocols for scalable verificationAmlan NayakJay Zhang
1110-NovThreadmill: a post-silicon exerciser for multi-threaded processorsDong-hyeon ParkAbraham Addisie
1212-NovQED: quick error detection tests for effective post-silicon validationJiabo LiJiong Xue
1312-NovAutomatic concolic test generation with virtual prototypes for post-silicon validationJianchao GaoDike Zhou
1417-NovTransaction-based online debug for NoC-based multiprocessor SoCsChenxi LouXiangfei Kong
1517-NovRuntime validation of memory ordering using constraint graph checkingSijia HeXiaoming Guo
1619-NovDecoupling dynamic information flow tracking with a dedicated coprocessorYue ZhengYulin Shi
1724-NovRaccoon: closing digital side-channels through obfuscated executionArjun KhuranaTimothy Wong

Back to the homepage